| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_compiler_util.c | 122 ret |= GET_BIT(mask, swz) << chan; 172 if (!GET_BIT(old_mask, i) 298 tmp.Negate |= GET_BIT(srcreg.Negate, swz) << i; 689 if (!GET_BIT(old_mask, old_idx)) 692 if (GET_BIT(new_mask, new_idx)) { 730 if(GET_BIT(negate, chan)){
|
| H A D | radeon_pair_translate.c | 286 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); 295 GET_BIT(inst->DstReg.WriteMask, 3); 307 pair->Alpha.WriteMask |= (GET_BIT(inst->DstReg.WriteMask, 3) << 3);
|
| H A D | radeon_program_constants.h | 121 #define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1) macro
|
| H A D | r300_fragprog_swizzle.c | 167 if (!GET_BIT(mask, comp))
|
| H A D | radeon_dataflow_swizzles.c | 69 if (!GET_BIT(split.Phase[phase], chan)) 92 GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED);
|
| H A D | r500_fragprog.c | 252 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i)) 254 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
|
| H A D | radeon_dataflow_deadcode.c | 190 if (GET_BIT(newsrcmask, chan)) 352 if (!GET_BIT(srcmasks[src], chan))
|
| H A D | radeon_optimize.c | 214 *pnegate = GET_BIT(src.Negate, chan); 217 if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) {
|
| H A D | radeon_program_print.c | 191 if (GET_BIT(negate, comp))
|
| H A D | radeon_dataflow.c | 308 if (GET_BIT(mask, chan))
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_compiler_util.c | 122 ret |= GET_BIT(mask, swz) << chan; 172 if (!GET_BIT(old_mask, i) 298 tmp.Negate |= GET_BIT(srcreg.Negate, swz) << i; 689 if (!GET_BIT(old_mask, old_idx)) 692 if (GET_BIT(new_mask, new_idx)) { 730 if(GET_BIT(negate, chan)){
|
| H A D | radeon_pair_translate.c | 288 pair->Alpha.DepthWriteMask |= GET_BIT(inst->DstReg.WriteMask, 3); 297 GET_BIT(inst->DstReg.WriteMask, 3); 309 pair->Alpha.WriteMask |= (GET_BIT(inst->DstReg.WriteMask, 3) << 3);
|
| H A D | radeon_program_constants.h | 121 #define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1) macro
|
| H A D | r300_fragprog_swizzle.c | 167 if (!GET_BIT(mask, comp))
|
| H A D | radeon_dataflow_swizzles.c | 69 if (!GET_BIT(split.Phase[phase], chan)) 92 GET_BIT(usemask, chan) ? chan : RC_SWIZZLE_UNUSED);
|
| H A D | r500_fragprog.c | 251 if (swz == RC_SWIZZLE_UNUSED || !GET_BIT(usemask, i)) 253 negatebase[GET_BIT(src.Negate, i)] |= 1 << i;
|
| H A D | radeon_dataflow_deadcode.c | 190 if (GET_BIT(newsrcmask, chan)) 357 if (!GET_BIT(srcmasks[src], chan))
|
| H A D | radeon_optimize.c | 216 *pnegate = GET_BIT(src.Negate, chan); 219 if (swz != *pswz || *pnegate != GET_BIT(src.Negate, chan)) {
|
| H A D | radeon_program_print.c | 191 if (GET_BIT(negate, comp))
|
| H A D | radeon_dataflow.c | 308 if (GET_BIT(mask, chan))
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/program/ |
| H A D | prog_instruction.h | 61 #define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1) macro
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/program/ |
| H A D | prog_instruction.h | 61 #define GET_BIT(msk, idx) (((msk) >> (idx)) & 0x1) macro
|
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/ |
| H A D | i915_fragprog.c | 205 GET_BIT(source->Negate, 0), 206 GET_BIT(source->Negate, 1), 207 GET_BIT(source->Negate, 2), 208 GET_BIT(source->Negate, 3));
|
| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/ |
| H A D | i915_fragprog.c | 205 GET_BIT(source->Negate, 0), 206 GET_BIT(source->Negate, 1), 207 GET_BIT(source->Negate, 2), 208 GET_BIT(source->Negate, 3));
|