Searched refs:GLINT_READ_REG (Results 1 - 20 of 20) sorted by relevance

/xsrc/external/mit/xf86-video-glint/dist/src/
H A Dpm2vramdac.c50 tmp = GLINT_READ_REG (PM2VDACIndexData) & mask;
62 ret = GLINT_READ_REG (PM2VDACIndexData);
H A Dpm_dac.c92 pReg->glintRegs[ChipConfig >> 3] = GLINT_READ_REG(ChipConfig) & 0xFFFFFFFD;
195 glintReg->glintRegs[Aperture0 >> 3] = GLINT_READ_REG(Aperture0);
196 glintReg->glintRegs[Aperture1 >> 3] = GLINT_READ_REG(Aperture1);
198 GLINT_READ_REG(PMFramebufferWriteMask);
200 GLINT_READ_REG(PMBypassWriteMask);
201 glintReg->glintRegs[DFIFODis >> 3] = GLINT_READ_REG(DFIFODis);
202 glintReg->glintRegs[FIFODis >> 3] = GLINT_READ_REG(FIFODis);
204 glintReg->glintRegs[PMHTotal >> 3] = GLINT_READ_REG(PMHTotal);
205 glintReg->glintRegs[PMHbEnd >> 3] = GLINT_READ_REG(PMHbEnd);
206 glintReg->glintRegs[PMHgEnd >> 3] = GLINT_READ_REG(PMHgEn
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H A Dpm2_dac.c126 pReg->glintRegs[PMMemConfig >> 3] = GLINT_READ_REG(PMMemConfig) | 1<<21;
163 pReg->glintRegs[VClkCtl >> 3] = (GLINT_READ_REG(VClkCtl) & 0xFFFFFFFC);
167 pReg->glintRegs[ChipConfig >> 3] = GLINT_READ_REG(ChipConfig) & 0xFFFFFFDD;
236 glintReg->glintRegs[Aperture0 >> 3] = GLINT_READ_REG(Aperture0);
237 glintReg->glintRegs[Aperture1 >> 3] = GLINT_READ_REG(Aperture1);
239 GLINT_READ_REG(PMFramebufferWriteMask);
240 glintReg->glintRegs[PMBypassWriteMask >> 3] = GLINT_READ_REG(PMBypassWriteMask);
241 glintReg->glintRegs[DFIFODis >> 3] = GLINT_READ_REG(DFIFODis);
242 glintReg->glintRegs[FIFODis >> 3] = GLINT_READ_REG(FIFODis);
245 glintReg->glintRegs[PMMemConfig >> 3] = GLINT_READ_REG(PMMemConfi
[all...]
H A Dpm2v_dac.c176 pReg->glintRegs[PMMemConfig >> 3] = GLINT_READ_REG(PMMemConfig) | 1<<21;
210 pReg->glintRegs[VClkCtl >> 3] = (GLINT_READ_REG(VClkCtl) & 0xFFFFFFFC);
216 pReg->glintRegs[ChipConfig >> 3] = GLINT_READ_REG(ChipConfig) & 0xFFFFFFDD;
287 glintReg->glintRegs[ChipConfig >> 3] = GLINT_READ_REG(ChipConfig);
288 glintReg->glintRegs[Aperture0 >> 3] = GLINT_READ_REG(Aperture0);
289 glintReg->glintRegs[Aperture1 >> 3] = GLINT_READ_REG(Aperture1);
291 GLINT_READ_REG(PMFramebufferWriteMask);
293 GLINT_READ_REG(PMBypassWriteMask);
294 glintReg->glintRegs[DFIFODis >> 3] = GLINT_READ_REG(DFIFODis);
295 glintReg->glintRegs[FIFODis >> 3] = GLINT_READ_REG(FIFODi
[all...]
H A DIBMramdac.c61 tmp = GLINT_READ_REG (IBMRGB_INDEX_DATA) & mask;
74 ret = GLINT_READ_REG(IBMRGB_INDEX_DATA);
108 return(GLINT_READ_REG(IBMRGB_RAMDAC_DATA));
H A DTIramdac.c70 tmp = GLINT_READ_REG(offset) & mask;
78 tmp = GLINT_READ_REG(TI_INDEX_DATA) & mask;
93 ret = GLINT_READ_REG(offset);
97 ret = GLINT_READ_REG(TI_INDEX_DATA);
133 return(GLINT_READ_REG(TI_RAMDAC_DATA));
H A Dpm2_common.c172 while (GLINT_READ_REG(DMACount) != 0);
177 while(GLINT_READ_REG(OutFIFOWords) == 0);
178 } while (GLINT_READ_REG(OutputFIFO) != Sync_tag);
H A Dpm2ramdac.c50 tmp = GLINT_READ_REG (PM2DACIndexData) & mask;
63 ret = GLINT_READ_REG (PM2DACIndexData);
98 return(GLINT_READ_REG(PM2DACData));
H A Dtx_dac.c75 pReg->glintRegs[LBMemoryEDO >> 3] = GLINT_READ_REG(LBMemoryEDO);
82 pReg->glintRegs[LBMemoryCtl >> 3] = GLINT_READ_REG(LBMemoryCtl);
102 STOREREG(DFIFODis, GLINT_READ_REG(DFIFODis) & 0xFFFFFFFE);
103 STOREREG(FIFODis, GLINT_READ_REG(FIFODis) | 0x01);
160 STOREREG(FBMemoryCtl, GLINT_READ_REG(FBMemoryCtl));
H A Dpm3_accel.c528 while (GLINT_READ_REG(DMACount) != 0);
533 while(GLINT_READ_REG(OutFIFOWords) == 0);
534 } while (GLINT_READ_REG(OutputFIFO) != Sync_tag);
546 while (GLINT_READ_REG(DMACount) != 0);
555 while(GLINT_READ_REG(OutFIFOWords) == 0);
556 } while (GLINT_READ_REG(OutputFIFO) != Sync_tag);
561 while(GLINT_READ_REG(OutFIFOWords) == 0);
562 } while (GLINT_READ_REG(OutputFIFO) != Sync_tag);
H A Dtx_accel.c337 while (GLINT_READ_REG(DMACount) != 0);
342 while(GLINT_READ_REG(OutFIFOWords) == 0);
343 readValue = GLINT_READ_REG(OutputFIFO);
356 while (GLINT_READ_REG(DMACount) != 0);
367 while(GLINT_READ_REG(OutFIFOWords) == 0);
368 readValue = GLINT_READ_REG(OutputFIFO);
374 while(GLINT_READ_REG(OutFIFOWords) == 0);
375 readValue = GLINT_READ_REG(OutputFIFO);
H A Dpm3_dac.c87 temp = GLINT_READ_REG(PM3MemBypassWriteMask);
465 LocalMemCaps = GLINT_READ_REG(PM3LocalMemCaps);
548 STOREREG(VClkCtl, GLINT_READ_REG(VClkCtl) & 0xFFFFFFFC);
550 STOREREG(ChipConfig, GLINT_READ_REG(ChipConfig) & 0xFFFFFFFD);
H A Dglint_regs.h1232 #define GLINT_READ_REG(r) \ macro
1238 #define GLINT_READ_REG(r) \ macro
1249 while((tmp=GLINT_READ_REG(InFIFOSpace))<(n)); \
1260 while(delay--){tmp = GLINT_READ_REG(InFIFOSpace);}; \
1264 GLINT_WRITE_REG((GLINT_READ_REG(r)&(m))|(v),r)
1326 pReg->glintRegs[address >> 3] = GLINT_READ_REG(address);
H A Dglint_driver.c381 vtgpolarity = GLINT_READ_REG(VTGPolarity) & 0xFFFFFFF0;
383 videocontrol = GLINT_READ_REG(PMVideoControl) & 0xFFFFFFD6;
802 temp = GLINT_READ_REG(GCSRAperture);
1289 GLINT_READ_REG(GCSRAperture) | GCSRBitSwap
1436 pScrn->videoRam = (1 << ((GLINT_READ_REG(FBMemoryCtl) &
1444 pScrn->videoRam = (((GLINT_READ_REG(PMMemConfig) >> 29) &
1460 pScrn->videoRam = (((GLINT_READ_REG(PMMemConfig)>>29) &
1466 pScrn->videoRam = (1 << ((GLINT_READ_REG(FBMemoryCtl) &
1472 pScrn->videoRam = (1 << ((GLINT_READ_REG(FBMemoryCtl) &
1479 (1 << ((GLINT_READ_REG(FBMemoryCt
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H A Dsx_accel.c306 while (GLINT_READ_REG(DMACount) != 0);
311 while(GLINT_READ_REG(OutFIFOWords) == 0);
312 readValue = GLINT_READ_REG(OutputFIFO);
H A Dpm2_video.c833 if (!nCookies || (GLINT_READ_REG(InFIFOSpace) < 200))
1115 if (!nCookies || (GLINT_READ_REG(InFIFOSpace) < 200))
1219 GLINT_READ_REG(VSABase + VSVideoAddressIndex)], FORMAT_YUYV, 1, 0);
1256 delay = GLINT_READ_REG(VSABase + VSCurrentLine);
1258 if (!(GLINT_READ_REG(VSStatus) & VS_FieldOne0A))
1266 delay = GLINT_READ_REG(VSBBase + VSCurrentLine);
1268 if (!(GLINT_READ_REG(VSStatus) & VS_FieldOne0B))
1323 line = GLINT_READ_REG(VSABase + VSCurrentLine);
1459 line = GLINT_READ_REG(VSABase + VSCurrentLine);
1593 GLINT_READ_REG(VSABas
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H A Dpm_accel.c329 while (GLINT_READ_REG(DMACount) != 0);
334 while(GLINT_READ_REG(OutFIFOWords) == 0);
335 } while (GLINT_READ_REG(OutputFIFO) != Sync_tag);
/xsrc/external/mit/xf86-video-ag10e/dist/src/
H A Dglint_regs.h1224 #define GLINT_READ_REG(r) \ macro
1230 #define GLINT_READ_REG(r) \ macro
1241 while((tmp=GLINT_READ_REG(InFIFOSpace))<(n)); \
1251 while(delay--){(void)GLINT_READ_REG(InFIFOSpace);}; \
1255 GLINT_WRITE_REG((GLINT_READ_REG(r)&(m))|(v),r)
1333 pReg->glintRegs[address >> 3] = GLINT_READ_REG(address);
H A Dag10e_accel.c314 while (GLINT_READ_REG(DMACount) != 0);
319 while(GLINT_READ_REG(OutFIFOWords) == 0);
320 readValue = GLINT_READ_REG(OutputFIFO);
H A Dag10e_driver.c524 (1 << ((GLINT_READ_REG(FBMemoryCtl) & 0xE0000000)>>29)) * 1024);

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