Searched refs:I1_LOAD_S (Results 1 - 25 of 38) sorted by relevance

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/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.c90 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2);
H A Di915_video.c128 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
129 I1_LOAD_S(5) | I1_LOAD_S(6) | 2);
H A Di915_render.c929 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(6) | 1);
958 I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
965 I1_LOAD_S(1) | 0);
H A Di830_render.c614 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
H A Di830_reg.h640 #define I1_LOAD_S(n) (1<<((n)+4)) macro
H A Di915_reg.h326 #define I1_LOAD_S(n) (1<<(4+n)) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.c90 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | I1_LOAD_S(4) | I1_LOAD_S(5) | 2);
H A Di915_video.c128 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
129 I1_LOAD_S(5) | I1_LOAD_S(6) | 2);
H A Di915_render.c929 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) | I1_LOAD_S(6) | 1);
958 I1_LOAD_S(0) | I1_LOAD_S(1) | 1);
965 I1_LOAD_S(1) | 0);
H A Di830_render.c614 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_3d.c91 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(3) | 0);
H A Di915_video.c108 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
109 I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
H A Di915_render.c448 OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(2) |
449 I1_LOAD_S(4) | I1_LOAD_S(5) | I1_LOAD_S(6) | 3);
H A Di830_render.c561 I1_LOAD_S(2) |
562 I1_LOAD_S(3) |
563 I1_LOAD_S(8) |
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h54 #define I1_LOAD_S(n) (1<<(4+n)) macro
H A Di915_state.c928 I1_LOAD_S(2) | I1_LOAD_S(3) |
929 I1_LOAD_S(4) | I1_LOAD_S(5) |
930 I1_LOAD_S(6) | (4));
H A Dintel_tris.c251 cmd |= I1_LOAD_S(0);
256 cmd |= I1_LOAD_S(1);
286 I1_LOAD_S(0) | I1_LOAD_S(2) | 1);
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h54 #define I1_LOAD_S(n) (1<<(4+n)) macro
H A Di915_state.c928 I1_LOAD_S(2) | I1_LOAD_S(3) |
929 I1_LOAD_S(4) | I1_LOAD_S(5) |
930 I1_LOAD_S(6) | (4));
H A Dintel_tris.c251 cmd |= I1_LOAD_S(0);
256 cmd |= I1_LOAD_S(1);
286 I1_LOAD_S(0) | I1_LOAD_S(2) | 1);
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.c708 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
1115 BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(8) | 0);
2430 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
2713 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(
[all...]
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.c727 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
1134 BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(8) | 0);
2461 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(8) | 2);
2748 I1_LOAD_S(2) | I1_LOAD_S(3) | I1_LOAD_S(
[all...]
H A Dgen2_render.h562 #define I1_LOAD_S(n) (1<<((n)+4)) macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h634 #define I1_LOAD_S(n) (1<<((n)+4)) macro
H A Di915_reg.h326 #define I1_LOAD_S(n) (1<<(4+n)) macro

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