Searched refs:INST (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dtest_eu_validate.cpp859 #define INST(dst_type, src_type, dst_stride, expected_result) \ macro
867 INST(B, Q, 1, false),
868 INST(B, UQ, 1, false),
869 INST(B, DF, 1, false),
870 INST(UB, Q, 1, false),
871 INST(UB, UQ, 1, false),
872 INST(UB, DF, 1, false),
874 INST(B, Q, 2, false),
875 INST(B, UQ, 2, false),
876 INST(
1034 dst_stride, dst_indirect, src0_indirect, expected_result) \\ macro
1096 dst_stride, expected_result) \\ macro
1152 expected_result_bdw, expected_result_chv_skl) \\ macro
1224 expected_result_chv_skl) \\ macro
1304 dst_stride, src0_stride, src1_stride, expected_result) \\ macro
1369 expected_result_bdw, expected_result_chv_skl) \\ macro
1447 src0_vstride, src1_vstride, expected_result) \\ macro
1503 #define INST macro
1556 #define INST macro
1607 src0_vstride, src1_vstride, expected_result) \\ macro
1750 src_subreg, src_vstride, src_width, src_hstride, expected_result) \\ macro
1927 expected_result) \\ macro
2052 acc_wr, expected_result) \\ macro
2194 #define INST macro
2278 no_dd_check, no_dd_clear, expected_result) \\ macro
2397 gen, expected_result) \\ macro
[all...]
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dtest_eu_validate.cpp1252 #define INST(dst_type, src_type, dst_stride, expected_result) \ macro
1260 INST(B, Q, 1, false),
1261 INST(B, UQ, 1, false),
1262 INST(B, DF, 1, false),
1263 INST(UB, Q, 1, false),
1264 INST(UB, UQ, 1, false),
1265 INST(UB, DF, 1, false),
1267 INST(B, Q, 2, false),
1268 INST(B, UQ, 2, false),
1269 INST(
1440 dst_stride, dst_indirect, src0_indirect, expected_result) \\ macro
1502 dst_stride, expected_result) \\ macro
1558 expected_result_bdw, expected_result_chv_skl) \\ macro
1630 expected_result_chv_skl) \\ macro
1710 dst_stride, src0_stride, src1_stride, expected_result) \\ macro
1775 expected_result_bdw, expected_result_chv_skl) \\ macro
1853 src0_vstride, src1_vstride, expected_result) \\ macro
1909 #define INST macro
1962 #define INST macro
2013 src0_vstride, src1_vstride, expected_result) \\ macro
2156 src_subreg, src_vstride, src_width, src_hstride, expected_result) \\ macro
2345 expected_result) \\ macro
2478 acc_wr, expected_result) \\ macro
2628 #define INST macro
2712 no_dd_check, no_dd_clear, expected_result) \\ macro
2843 gfx_ver, expected_result) \\ macro
[all...]
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_exec.h51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
61 #define TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
62 ((INST)->Dst[1].Register.WriteMask & (1 << (CHAN)))
64 #define TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
65 if (TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHA
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_exec.h51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
61 #define TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
62 ((INST)->Dst[1].Register.WriteMask & (1 << (CHAN)))
64 #define TGSI_IF_IS_DST1_CHANNEL_ENABLED( INST, CHAN )\
65 if (TGSI_IS_DST1_CHANNEL_ENABLED( INST, CHA
[all...]

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