Searched refs:MSR (Results 1 - 13 of 13) sorted by relevance

/xsrc/external/mit/xf86-video-geode/dist/src/gfx/
H A Dmsr_rdcl.c27 * This file contains MSR access routines for Redcloud.
31 int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size);
34 DEV_STATUS redcloud_find_msr_device(MSR * pDev);
38 /* REDCLOUD MSR BITMASKS */
50 /* REDCLOUD and CS5535 MSR DEVICES */
52 MSR msrDev[] = {
139 /* repeated MSR accesses. */
143 /* INITIALIZE MSR DEVICES */
343 redcloud_init_msr_devices(MSR aDev[], unsigned int array_size)
384 redcloud_find_msr_device(MSR * pDe
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H A Dgfx_msr.c75 gfx_id_msr_device(MSR * pDev, unsigned long address)
H A Dgfx_type.h34 /* MSR DEFINITIONS */
41 unsigned char Id; /* Device ID (from MSR specs) */
44 } MSR; typedef in typeref:struct:msr
57 /* MSR ARRAY INDEXES */
59 /* should not be confused with the class codes at MSR register */
112 /* MSR PORT DESCRIPTORS */
H A Dgfx_priv.h75 /* MSR ROUTINES */
83 int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size);
84 DEV_STATUS redcloud_find_msr_device(MSR * pDev);
90 DEV_STATUS redcloud_id_msr_device(MSR * pDev, unsigned long address);
H A Dgfx_rtns.h126 DEV_STATUS gfx_id_msr_device(MSR * pDev, unsigned long address);
/xsrc/external/mit/xf86-video-nsc/dist/src/gfx/
H A Dmsr_rdcl.c5 * This file contains MSR access routines for Redcloud.
132 DEV_STATUS redcloud_id_msr_device(MSR * pDev, unsigned long address);
143 int redcloud_init_msr_devices(MSR aDev[], unsigned int array_size); /* private routine definition */
144 DEV_STATUS redcloud_find_msr_device(MSR * pDev); /* private routine definition */
146 /* REDCLOUD MSR BITMASKS */
158 /* REDCLOUD and CS5535 MSR DEVICES */
160 MSR msrDev[] = {
245 /* repeated MSR accesses. */
249 /* INITIALIZE MSR DEVICES */
445 redcloud_init_msr_devices(MSR aDe
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H A Dgfx_msr.c172 gfx_id_msr_device(MSR * pDev, unsigned long address)
H A Ddurango.c324 ;EDX:EAX will contain MSR contents.
357 ;MSR is written at this point
580 /* INCLUDE MSR ACCESS ROUTINES */
H A Dgfx_type.h135 /* MSR DEFINITIONS */
144 unsigned char Id; /* Device ID (from MSR specs) */
147 MSR; typedef in typeref:struct:msr
164 /* MSR ARRAY INDEXES */
166 /* should not be confused with the class codes at MSR register */
219 /* MSR PORT DESCRIPTORS */
H A Dgfx_rtns.h227 DEV_STATUS gfx_id_msr_device(MSR * pDev, unsigned long address);
/xsrc/external/mit/xf86-video-nsc/dist/src/
H A Ddurango.c332 ;EDX:EAX will contain MSR contents.
365 ;MSR is written at this point
675 /* INCLUDE MSR ACCESS ROUTINES */
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/common/
H A Disa.hpp70 bool MSR(void) { return CPU_Rep.f_1_EDX_[5]; } function in class:InstructionSet
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/rasterizer/common/
H A Disa.hpp70 bool MSR(void) { return CPU_Rep.f_1_EDX_[5]; } function in class:InstructionSet

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