Searched refs:MUBUF (Results 1 - 17 of 17) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_opt_value_numbering.cpp | 103 case Format::MUBUF: return hash_murmur_32<MUBUF_instruction>(instr); 251 case Format::MUBUF: { 339 case Format::MUBUF:
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| H A D | aco_opcodes.py | 62 MUBUF = 10 variable in class:Format 106 elif self == Format.MUBUF: 1283 # MUBUF instructions: 1284 MUBUF = { variable 1366 for (gfx6, gfx7, gfx8, gfx9, gfx10, name) in MUBUF: 1367 opcode(name, gfx7, gfx9, gfx10, Format.MUBUF, InstrClass.VMem, is_atomic = "atomic" in name)
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| H A D | README-ISA.md | 185 ## SGPR offset on MUBUF prevents addr clamping on SI/CI
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| H A D | aco_insert_waitcnt.cpp | 673 case Format::MUBUF:
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| H A D | aco_ir.cpp | 173 case Format::MUBUF: return instr->mubuf().sync;
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| H A D | aco_print_ir.cpp | 364 case Format::MUBUF: {
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| H A D | aco_ir.h | 83 MUBUF = 10, enumerator in enum:aco::Format 1130 constexpr bool isMUBUF() const noexcept { return format == Format::MUBUF; }
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| H A D | aco_assembler.cpp | 380 case Format::MUBUF: {
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| H A D | aco_instruction_selection.cpp | 4063 aco_ptr<MUBUF_instruction> mubuf{create_instruction<MUBUF_instruction>(op, Format::MUBUF, 3, 1)}; 4139 create_instruction<MUBUF_instruction>(op, Format::MUBUF, 3, 1)}; 5109 /* use MUBUF when possible to avoid possible alignment issues */ 6170 create_instruction<MUBUF_instruction>(opcode, Format::MUBUF, 3 + is_sparse, 1)}; 6247 create_instruction<MUBUF_instruction>(opcode, Format::MUBUF, 4, 0)}; 6378 is_64bit ? buf_op64 : buf_op, Format::MUBUF, 4, return_previous ? 1 : 0)}; 6574 create_instruction<MUBUF_instruction>(op, Format::MUBUF, 4, 0)}; 6662 create_instruction<MUBUF_instruction>(op, Format::MUBUF, 4, return_previous ? 1 : 0)}; 6810 create_instruction<MUBUF_instruction>(op, Format::MUBUF, 4, 0)}; 6979 create_instruction<MUBUF_instruction>(op, Format::MUBUF, [all...] |
| H A D | aco_validate.cpp | 542 case Format::MUBUF: {
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| /xsrc/external/mit/MesaLib/dist/docs/relnotes/ |
| H A D | 20.3.5.rst | 244 - radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2
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| H A D | 20.0.0.rst | 758 - aco: use soffset for MUBUF instructions on SI/CI 2879 - aco: value-number MUBUF instructions 2880 - aco: use MUBUF in some situations instead of splitting vertex fetches 3182 - aco: fix emitting slc for MUBUF instructions on GFX6-GFX7 3188 - aco: add new addr64 bit to MUBUF instructions on GFX6-GFX7 3238 - aco: fix VS input loads with MUBUF on GFX6 3243 - aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6
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| H A D | 20.1.0.rst | 1225 - aco: use MUBUF to load subdword SSBO 3816 - aco: fix MUBUF VS input loads when expanding vec3 to vec4 on GFX6
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| H A D | 21.1.0.rst | 4711 - radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2 4789 - aco: fix NSA MIMG followed by MUBUF/MTBUF
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| H A D | 19.3.0.rst | 3285 - aco: Support GFX10 MUBUF in aco_assembler.
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| H A D | 21.0.0.rst | 2810 - radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2
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| H A D | 21.2.0.rst | 4418 - Revert "radv,aco: don't use MUBUF for multi-channel loads on GFX8 with robustness2"
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