Searched refs:MUX_MASK (Results 1 - 2 of 2) sorted by relevance
| /xsrc/external/mit/MesaLib/dist/src/broadcom/qpu/ |
| H A D | qpu_pack.c | 450 #define MUX_MASK(bot, top) (((1 << (top + 1)) - 1) - ((1 << (bot)) - 1)) macro
451 #define ANYMUX MUX_MASK(0, 7)
516 { 187, 187, 1 << 1, MUX_MASK(0, 2), V3D_QPU_A_FXCD },
518 { 187, 187, 1 << 1, MUX_MASK(4, 6), V3D_QPU_A_FYCD },
552 { 245, 245, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FROUND },
554 { 245, 245, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FTRUNC },
556 { 246, 246, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FFLOOR },
558 { 246, 246, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FCEIL },
561 { 247, 247, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FDX },
562 { 247, 247, MUX_MASK(
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| /xsrc/external/mit/MesaLib.old/dist/src/broadcom/qpu/ |
| H A D | qpu_pack.c | 449 #define MUX_MASK(bot, top) (((1 << (top + 1)) - 1) - ((1 << (bot)) - 1)) macro
450 #define ANYMUX MUX_MASK(0, 7)
508 { 187, 187, 1 << 1, MUX_MASK(0, 2), V3D_QPU_A_FXCD },
510 { 187, 187, 1 << 1, MUX_MASK(4, 6), V3D_QPU_A_FYCD },
539 { 245, 245, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FROUND },
541 { 245, 245, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FTRUNC },
543 { 246, 246, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FFLOOR },
545 { 246, 246, MUX_MASK(4, 6), ANYMUX, V3D_QPU_A_FCEIL },
548 { 247, 247, MUX_MASK(0, 2), ANYMUX, V3D_QPU_A_FDX },
549 { 247, 247, MUX_MASK(
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