Searched refs:OP_LOAD (Results 1 - 25 of 33) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target_nv50.cpp288 ((i->op != OP_ATOM && i->op != OP_LOAD) ||
410 if (i->op == OP_LOAD || i->op == OP_STORE || i->op == OP_ATOM) {
528 if (i->op == OP_LOAD) {
H A Dnv50_ir_target_gm107.cpp311 case OP_LOAD:
H A Dnv50_ir_target_nvc0.cpp358 // indirect loads can only be done by OP_LOAD/VFETCH/INTERP on nvc0
397 && i->op != OP_LOAD)
449 (insn->op != OP_LOAD || insn->subOp != NV50_IR_SUBOP_LDC_IS))
583 case OP_LOAD:
597 if (i->op == OP_LOAD) {
H A Dnv50_ir_peephole.cpp165 return ld && ld->op == OP_LOAD && ld->src(0).getFile() == FILE_MEMORY_CONST;
185 (ld->op == OP_LOAD &&
277 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV))
279 if (ld->op == OP_LOAD && ld->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
2947 if (insn->op == OP_LOAD || insn->op == OP_VFETCH)
2973 if (it->locked && insn->op != OP_LOAD && insn->op != OP_VFETCH)
3179 if (ldst->op == OP_LOAD || ldst->op == OP_VFETCH) {
3309 if (ld->op != OP_MOV && ld->op != OP_LOAD)
3456 ((insn->op != OP_LOAD && insn->op != OP_STORE && insn->op != OP_ATOM) ||
3772 if (op == OP_LOAD || o
[all...]
H A Dnv50_ir_lowering_gm107.cpp104 case OP_LOAD:
H A Dnv50_ir_lowering_gv100.cpp315 case OP_LOAD:
H A Dnv50_ir_ra.cpp1756 ld = new_Instruction(func, OP_LOAD, ty);
1765 Instruction *l = new_Instruction(func, OP_LOAD, TYPE_U32);
2567 if (i->op == OP_LOAD || i->op == OP_VFETCH) {
2573 if (i->op == OP_LOAD && i->fixed && targ->getChipset() < 0xc0) {
2608 bool load = defi->op == OP_LOAD &&
2630 mov->op = OP_LOAD;
H A Dnv50_ir.h50 OP_LOAD, enumerator in enum:nv50_ir::operation
H A Dnv50_ir_build_util.cpp111 Instruction *insn = new_Instruction(func, OP_LOAD, ty);
H A Dnv50_ir_print.cpp668 case OP_LOAD:
H A Dnv50_ir_target_gv100.cpp295 case OP_LOAD:
H A Dnv50_ir_lowering_nvc0.cpp55 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) ||
855 if (i->op == OP_LOAD && i->subOp == NV50_IR_SUBOP_LDC_IS) {
3341 case OP_LOAD:
H A Dnv50_ir_emit_gv100.cpp1854 case OP_LOAD:
H A Dnv50_ir_lowering_nv50.cpp1299 bld.mkOp1(OP_LOAD, TYPE_U16, x,
2226 case OP_LOAD:
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target_gm107.cpp311 case OP_LOAD:
H A Dnv50_ir_target_nv50.cpp400 if (i->op == OP_LOAD || i->op == OP_STORE) {
517 if (i->op == OP_LOAD) {
H A Dnv50_ir_target_nvc0.cpp354 // indirect loads can only be done by OP_LOAD/VFETCH/INTERP on nvc0
439 (insn->op != OP_LOAD || insn->subOp != NV50_IR_SUBOP_LDC_IS))
573 case OP_LOAD:
587 if (i->op == OP_LOAD) {
H A Dnv50_ir_lowering_gm107.cpp86 case OP_LOAD:
H A Dnv50_ir_peephole.cpp165 return ld && ld->op == OP_LOAD && ld->src(0).getFile() == FILE_MEMORY_CONST;
185 (ld->op == OP_LOAD &&
277 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV))
2884 if (insn->op == OP_LOAD || insn->op == OP_VFETCH)
2910 if (it->locked && insn->op != OP_LOAD && insn->op != OP_VFETCH)
3116 if (ldst->op == OP_LOAD || ldst->op == OP_VFETCH) {
3235 if (ld->op != OP_MOV && ld->op != OP_LOAD)
3382 ((insn->op != OP_LOAD && insn->op != OP_STORE && insn->op != OP_ATOM) ||
3698 if (op == OP_LOAD || op == OP_VFETCH || op == OP_ATOM) {
3875 (i->op == OP_VFETCH || i->op == OP_LOAD)) {
[all...]
H A Dnv50_ir_print.cpp628 case OP_LOAD:
H A Dnv50_ir_ra.cpp1710 ld = new_Instruction(func, OP_LOAD, ty);
1719 Instruction *l = new_Instruction(func, OP_LOAD, TYPE_U32);
2503 if (i->op == OP_LOAD || i->op == OP_VFETCH) {
2530 bool load = defi->op == OP_LOAD &&
2552 mov->op = OP_LOAD;
H A Dnv50_ir_lowering_nv50.cpp1187 bld.mkOp1(OP_LOAD, TYPE_U16, x,
1429 case OP_LOAD:
H A Dnv50_ir.h50 OP_LOAD, enumerator in enum:nv50_ir::operation
H A Dnv50_ir_build_util.cpp109 Instruction *insn = new_Instruction(func, OP_LOAD, ty);
H A Dnv50_ir_lowering_nvc0.cpp55 if (!ld || ld->fixed || (ld->op != OP_LOAD && ld->op != OP_MOV) ||
844 if (i->op == OP_LOAD && i->subOp == NV50_IR_SUBOP_LDC_IS) {
3127 case OP_LOAD:

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