Searched refs:OP_MAD (Results 1 - 25 of 32) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_from_common.cpp92 mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
H A Dnv50_ir_target_gm107.cpp173 if ((insn->op == OP_MUL || insn->op == OP_MAD) &&
218 case OP_MAD:
H A Dnv50_ir_target_nv50.cpp90 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
116 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN,
121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP,
345 if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
H A Dnv50_ir_target_nvc0.cpp107 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // special c[] constraint
108 { OP_FMA, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // keep the same as OP_MAD
198 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN,
204 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN
537 return (insn->op == OP_ADD) || (insn->op == OP_MAD);
613 case OP_MAD:
645 case OP_MAD:
H A Dnv50_ir_peephole.cpp561 case OP_MAD:
738 case OP_MAD:
790 case OP_MAD:
941 case OP_MAD:
1124 case OP_MAD:
1243 bld.mkOp3(OP_MAD, TYPE_S32, tA, i->getSrc(0), bld.loadImm(NULL, m),
1834 if (!add->precise && prog->getTarget()->isOpSupported(OP_MAD, add->dType))
1835 changed = tryADDToMADOrSAD(add, OP_MAD);
1851 const Modifier modBad = Modifier(~((toOp == OP_MAD) ? NV50_IR_MOD_NEG : 0));
2502 case OP_MAD
[all...]
H A Dnv50_ir_lowering_nv50.cpp102 i[3] = bld->mkOp3(OP_MAD, fTy, t[1], a[1], b[0], t[0]);
110 i[4] = bld->mkOp3(OP_MAD, fTy, t[3], a[0], b[0], t[2]);
126 i[5] = bld->mkOp3(OP_MAD, fTy, r[4], a[1], b[1], r[2]);
463 if (mul->op == OP_MAD) {
600 case OP_MAD:
1319 Value *sum = bld.mkOp3v(OP_MAD, TYPE_U16, bld.getSSA(), a[0], b[0],
H A Dnv50_ir_lowering_gm107.cpp249 bld.mkOp3(OP_MAD , TYPE_U32, tmp0, tmp0, tmp1, tmp2);
H A Dnv50_ir.h57 OP_MAD, enumerator in enum:nv50_ir::operation
H A Dnv50_ir_emit_nvc0.cpp2736 case OP_MAD:
2965 if (i->predSrc >= 0 && i->op == OP_MAD)
H A Dnv50_ir_emit_gk110.cpp2560 case OP_MAD:
H A Dnv50_ir_emit_nv50.cpp1904 case OP_MAD:
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_from_common.cpp94 mkOp3(OP_MAD, TYPE_F32, res[i], clipVtx[c], ucp, res[i]);
H A Dnv50_ir_target_gm107.cpp173 if ((insn->op == OP_MUL || insn->op == OP_MAD) &&
218 case OP_MAD:
H A Dnv50_ir_target_nv50.cpp90 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x1, 0x1, 0x0 }, // special constraint
116 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN,
121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP,
352 if ((i->op == OP_MUL || i->op == OP_MAD) && !isFloatType(i->dType)) {
H A Dnv50_ir_target_nvc0.cpp107 { OP_MAD, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // special c[] constraint
108 { OP_FMA, 0x7, 0x0, 0x0, 0x8, 0x6, 0x2 }, // keep the same as OP_MAD
198 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN,
204 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_AND, OP_OR, OP_XOR, OP_MAX, OP_MIN
547 return (insn->op == OP_ADD) || (insn->op == OP_MAD);
623 case OP_MAD:
655 case OP_MAD:
H A Dnv50_ir_lowering_gv100.cpp85 bld.mkOp3(OP_MAD, isSignedType(i->sType) ? TYPE_S64 : TYPE_U64, def,
113 bld.mkOp3(OP_MAD, i->dType, i->getDef(0), i->getSrc(0), i->getSrc(1),
287 case OP_MAD:
H A Dnv50_ir_peephole.cpp577 case OP_MAD:
754 case OP_MAD:
823 case OP_MAD:
974 case OP_MAD:
1159 case OP_MAD:
1279 bld.mkOp3(OP_MAD, TYPE_S32, tA, i->getSrc(0), bld.loadImm(NULL, m),
1887 if (!add->precise && prog->getTarget()->isOpSupported(OP_MAD, add->dType))
1888 changed = tryADDToMADOrSAD(add, OP_MAD);
1904 const Modifier modBad = Modifier(~((toOp == OP_MAD) ? NV50_IR_MOD_NEG : 0));
2555 case OP_MAD
[all...]
H A Dnv50_ir_target_gv100.cpp35 OP_ADD, OP_MUL, OP_MAD, OP_FMA, OP_MAX, OP_MIN,
280 case OP_MAD:
417 case OP_MAD:
442 if (op == OP_MAD || op == OP_FMA)
H A Dnv50_ir_lowering_gm107.cpp267 bld.mkOp3(OP_MAD , TYPE_U32, tmp0, tmp0, tmp1, tmp2);
H A Dnv50_ir_lowering_nv50.cpp120 i[3] = bld->mkOp3(OP_MAD, fTy, t[1], a[1], b[0], t[0]);
128 i[4] = bld->mkOp3(OP_MAD, fTy, t[3], a[0], b[0], t[2]);
144 i[5] = bld->mkOp3(OP_MAD, fTy, r[4], a[1], b[1], r[2]);
486 if (mul->op == OP_MAD) {
623 case OP_MAD:
1445 Value *sum = bld.mkOp3v(OP_MAD, TYPE_U16, bld.getSSA(), a[0], b[0],
H A Dnv50_ir.h57 OP_MAD, enumerator in enum:nv50_ir::operation
H A Dnv50_ir_from_nir.cpp2758 mkOp3(OP_MAD, TYPE_U32, prmt, getSrc(&insn->src[1]), loadImm(NULL, 0x1111), loadImm(NULL, 0x8880));
2766 mkOp3(OP_MAD, TYPE_U32, prmt, getSrc(&insn->src[1]), loadImm(NULL, 0x22), loadImm(NULL, 0x4410));
2774 mkOp3(OP_MAD, TYPE_U32, prmt, getSrc(&insn->src[1]), loadImm(NULL, 0x2222), loadImm(NULL, 0x9910));
H A Dnv50_ir_emit_gv100.cpp1835 case OP_MAD:
H A Dnv50_ir_emit_nvc0.cpp2743 case OP_MAD:
2972 if (i->predSrc >= 0 && i->op == OP_MAD)
H A Dnv50_ir_emit_gk110.cpp2567 case OP_MAD:

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