| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 132 case OP_RCP: 264 case OP_RCP: 292 case OP_RCP:
|
| H A D | nv50_ir_target_nv50.cpp | 104 { OP_RCP, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, 121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP, 544 case OP_RCP:
|
| H A D | nv50_ir_lowering_nv50.cpp | 514 bf = bld.mkOp1v(OP_RCP, TYPE_F32, bld.getSSA(), bf); 738 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 979 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 1234 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(), i->getSrc(1)); 1245 bld.mkOp1(OP_RCP, i->dType, i->getDef(0), i->getDef(0));
|
| H A D | nv50_ir_lowering_gm107.cpp | 160 bld.mkOp1(OP_RCP, TYPE_F32, val, val);
|
| H A D | nv50_ir_target_nvc0.cpp | 130 { OP_RCP, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 }, 625 case OP_RCP:
|
| H A D | nv50_ir_lowering_nvc0.cpp | 96 if (i->op == OP_RCP) 336 case OP_RCP: 935 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 1242 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 2886 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(typeSizeof(i->dType)), i->getSrc(1)); 2898 bld.mkOp1(OP_RCP, i->dType, value, i->getSrc(1)); 2926 bld.mkOp1(OP_RCP, i->dType, i->getDef(0), i->getDef(0));
|
| H A D | nv50_ir_print.cpp | 645 case OP_RCP:
|
| H A D | nv50_ir.h | 85 OP_RCP, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_from_tgsi.cpp | 2314 proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), proj); 2331 proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), fetchSrc(0, 3)); 3113 mkOp1(OP_RCP, TYPE_F32, w, w); 3300 mkOp1(OP_RCP, TYPE_F32, dst0[1], dst0[1]); 4338 mkOp1(OP_RCP, TYPE_F32, fragCoord[3], fragCoord[3]);
|
| H A D | nv50_ir_emit_nv50.cpp | 1492 assert(i->op == OP_RCP); 1954 case OP_RCP:
|
| H A D | nv50_ir_peephole.cpp | 852 case OP_RCP: res.data.f32 = 1.0f / imm.reg.data.f32; break; 1502 case OP_RCP: 1946 if (si->op == OP_RCP) { 2335 case OP_RCP:
|
| H A D | nv50_ir_from_nir.cpp | 429 return OP_RCP; 1588 fp.position = mkOp1v(OP_RCP, TYPE_F32, fragCoord[3], fragCoord[3]); 3269 proj = mkOp1v(OP_RCP, TYPE_F32, getScratch(), getSrc(&insn->src[projIdx].src, 0));
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_target_gm107.cpp | 132 case OP_RCP: 264 case OP_RCP: 292 case OP_RCP:
|
| H A D | nv50_ir_target_nv50.cpp | 104 { OP_RCP, 0x1, 0x1, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0 }, 121 OP_MOV, OP_ADD, OP_SUB, OP_MUL, OP_MAD, OP_SAD, OP_RCP, OP_LINTERP, 555 case OP_RCP:
|
| H A D | nv50_ir_lowering_gm107.cpp | 179 bld.mkOp1(OP_RCP, TYPE_F32, val, val);
|
| H A D | nv50_ir_target_nvc0.cpp | 130 { OP_RCP, 0x1, 0x1, 0x0, 0x8, 0x0, 0x0 }, 635 case OP_RCP:
|
| H A D | nv50_ir_lowering_nvc0.cpp | 96 if (i->op == OP_RCP) 344 case OP_RCP: 949 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 1256 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 3100 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(typeSizeof(i->dType)), i->getSrc(1)); 3112 bld.mkOp1(OP_RCP, i->dType, value, i->getSrc(1)); 3140 bld.mkOp1(OP_RCP, i->dType, i->getDef(0), i->getDef(0));
|
| H A D | nv50_ir_lowering_nv50.cpp | 537 bf = bld.mkOp1v(OP_RCP, TYPE_F32, bld.getSSA(), bf); 792 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 1033 bld.mkOp1(OP_RCP, TYPE_F32, val, val); 1351 Instruction *rcp = bld.mkOp1(OP_RCP, i->dType, bld.getSSA(), i->getSrc(1)); 1362 bld.mkOp1(OP_RCP, i->dType, i->getDef(0), i->getDef(0));
|
| H A D | nv50_ir_emit_gv100.cpp | 599 case OP_RCP : mufu = 4 + 2 * insn->subOp; break; 1814 case OP_RCP:
|
| H A D | nv50_ir.h | 87 OP_RCP, enumerator in enum:nv50_ir::operation
|
| H A D | nv50_ir_print.cpp | 685 case OP_RCP:
|
| H A D | nv50_ir_target_gv100.cpp | 269 case OP_RCP:
|
| H A D | nv50_ir_from_tgsi.cpp | 2296 proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), proj); 2313 proj = mkOp1v(OP_RCP, TYPE_F32, getSSA(), fetchSrc(0, 3)); 3136 mkOp1(OP_RCP, TYPE_F32, w, w); 3323 mkOp1(OP_RCP, TYPE_F32, dst0[1], dst0[1]); 4371 mkOp1(OP_RCP, TYPE_F32, fragCoord[3], fragCoord[3]);
|
| H A D | nv50_ir_emit_nv50.cpp | 1566 assert(i->op == OP_RCP); 2041 case OP_RCP:
|
| H A D | nv50_ir_peephole.cpp | 885 case OP_RCP: res.data.f32 = 1.0f / imm.reg.data.f32; break; 1549 case OP_RCP: 1999 if (si->op == OP_RCP) { 2388 case OP_RCP:
|