Searched refs:OP_SUEAU (Results 1 - 10 of 10) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_emit_gk110.cpp | 1859 case OP_SUEAU: opc1 = 0xb6c; opc2 = 0x1ec; break;
1875 if (i->op != OP_SUEAU) {
2739 case OP_SUEAU:
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| H A D | nv50_ir.h | 138 OP_SUEAU, // surface effective address enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_target_nvc0.cpp | 155 { OP_SUEAU, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 }
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| H A D | nv50_ir_emit_nvc0.cpp | 2269 case OP_SUEAU: opc = HEX64(60000000, 00000004); break;
2285 if (i->op != OP_SUEAU) {
2837 case OP_SUEAU:
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| H A D | nv50_ir_lowering_nvc0.cpp | 2092 eau = bld.mkOp3v(OP_SUEAU, TYPE_U32, bld.getScratch(4), off, bf, v);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_emit_gk110.cpp | 1866 case OP_SUEAU: opc1 = 0xb6c; opc2 = 0x1ec; break;
1882 if (i->op != OP_SUEAU) {
2746 case OP_SUEAU:
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| H A D | nv50_ir.h | 141 OP_SUEAU, // surface effective address enumerator in enum:nv50_ir::operation
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| H A D | nv50_ir_target_nvc0.cpp | 155 { OP_SUEAU, 0x0, 0x0, 0x0, 0x0, 0x6, 0x2 }
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| H A D | nv50_ir_emit_nvc0.cpp | 2276 case OP_SUEAU: opc = HEX64(60000000, 00000004); break;
2292 if (i->op != OP_SUEAU) {
2844 case OP_SUEAU:
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| H A D | nv50_ir_lowering_nvc0.cpp | 2113 eau = bld.mkOp3v(OP_SUEAU, TYPE_U32, bld.getScratch(4), off, bf, v);
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