Searched refs:P3d4 (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dvb_init.c312 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , 0 ) ; */
315 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , i , 0 ) ; /* shampoo 0208 */
321 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->pCRD0[i-0xd0] ) ;
323 XGI_SetReg( (XGIIOADDRESS) pVBInfo->P3d4 , i , pVBInfo->pCRDE[i-0xdE] ) ;
328 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4, 0x97, pVBInfo->CR97);
334 temp = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x97 ) ;
409 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x09 ) ;
418 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x0D ) ;
420 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x5F , 0x0B ) ;
423 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 ,
982 USHORT P3d4 = P3c4 + 0x10 ; local in function:XGINew_DDR2_MRS_340
1044 USHORT P3d4 = P3c4 + 0x10 ; local in function:XGINew_DDRII_Bootup_XG27
1121 USHORT P3d4 = P3c4 + 0x10 ; local in function:XGINew_DDR2_MRS_XG20
1174 USHORT P3d4 = P3c4 + 0x10 ; local in function:XGINew_DDR2_MRS_XG27
1254 USHORT P3d4 = Port , local in function:XGINew_DDR1x_DefaultRegister
1317 USHORT P3d4 = Port , local in function:XGINew_DDR2x_DefaultRegister
1373 USHORT P3d4 = Port , local in function:XGINew_DDR2_DefaultRegister
1415 USHORT P3d4 = Port , local in function:XGINew_SetDRAMDefaultRegister340
1561 USHORT P3d4 = Port , local in function:XGINew_SetDRAMDefaultRegisterXG45
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H A Dinit.c450 temp = XGI_GetReg(XGI_Pr->P3d4,0x11);
451 XGI_SetRegOR(XGI_Pr->P3d4,0x11,0x80);
452 temp1 = XGI_GetReg(XGI_Pr->P3d4,0x00);
453 XGI_SetReg(XGI_Pr->P3d4,0x00,0x55);
454 temp2 = XGI_GetReg(XGI_Pr->P3d4,0x00);
455 XGI_SetReg(XGI_Pr->P3d4,0x00,temp1);
456 XGI_SetReg(XGI_Pr->P3d4,0x11,temp);
474 XGI_SetRegAND(XGI_Pr->P3d4, 0x53, 0xbf);
532 XGI_SetRegAND(XGI_Pr->P3d4,0x11,0x7f); /* unlock cr0-7 */
543 XGI_SetReg(XGI_Pr->P3d4,
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H A Dvb_ext.c151 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , 0xA0 , temp ) ;
163 /* XGI_SetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x30 , 0x41 ) ; */
281 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4 , 0x32 , ~0xDF , tempax ) ;
341 XGI_SetRegANDOR((XGIIOADDRESS)pVBInfo->P3d4, 0x36, 0xF0, temp);
472 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->P3d4 , 0xB4 , ~0x04 ) ; /* CRB4[2] : FP power down */
478 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4 , 0xB4 , ~0x04 , 0x04 ) ;
529 ModeNo = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x34 ) ;
584 temp = XGI_GetReg((XGIIOADDRESS) pVBInfo->P3d4 , 0x38 ) ;
589 XGI_SetRegAND((XGIIOADDRESS) pVBInfo->P3d4 , 0x4A , ~0x20 ) ; /* Enable write GPIOF */
590 /*XGINew_SetRegANDOR( pVBInfo->P3d4 ,
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H A Dvb_setmode.c497 if ( ( XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x38 ) & 0xE0 ) == 0xC0 )
499 if ( XGI_GetReg( (XGIIOADDRESS) pVBInfo->P3d4 , 0x30 ) & 0x20 )
994 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x11, 0x7f, 0x00);
995 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x00, 0x00, (VGAHT & 0xff)); /* HT */
996 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x01, 0x00, (VGAHDE & 0xff)); /* HDEE */
997 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x02, 0x00, (HDE & 0xff)); /* HBS */
998 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x03, 0xe0, (HT & 0x1f)); /* HBE */
999 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x04, 0x00, (HRS & 0xff)); /* HRS */
1000 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4, 0x05, 0x60, (((HT & 0x20) << 2) | (HRE & 0x1f))); /* HRE */
1001 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->P3d4,
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H A Dvb_struct.h428 ULONG P3c4,P3d4,P3c0,P3ce,P3c2,P3cc; member in struct:_VB_DEVICE_INFO
437 USHORT P3c4,P3d4,P3c0,P3ce,P3c2,P3cc;
H A Dxgi_accel.c191 CR37=XGI_GetReg(pXGI->XGI_Pr->P3d4, 0x37); \

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