Searched refs:PACK0 (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dcayman_accel.c71 PACK0(SQ_ESGS_RING_ITEMSIZE, 6);
79 PACK0(SQ_GS_VERT_ITEMSIZE, 4);
85 PACK0(SQ_VTX_BASE_VTX_LOC, 2);
110 PACK0(PA_SC_VPORT_ZMIN_0, 2);
114 PACK0(DB_RENDER_CONTROL, 5);
121 PACK0(DB_STENCIL_CLEAR, 2);
137 PACK0(SX_ALPHA_TEST_CONTROL, 5);
162 PACK0(PA_SC_MODE_CNTL_0, 2);
166 PACK0(PA_SC_CENTROID_PRIORITY_0, 27);
211 PACK0(PA_CL_CLIP_CNT
[all...]
H A Devergreen_accel.c187 PACK0(SQ_CONFIG, 4);
192 PACK0(SQ_THREAD_RESOURCE_MGMT, 5);
333 PACK0(CB_COLOR0_CLEAR_WORD0 + (0x3c * cb_conf->id), 4);
434 PACK0(SPI_PS_IN_CONTROL_0, 3);
504 PACK0(SQ_PGM_RESOURCES_VS, 2);
552 PACK0(SQ_PGM_RESOURCES_PS, 3);
677 PACK0(SQ_FETCH_RESOURCE + res->id * SQ_FETCH_RESOURCE_offset, 8);
793 PACK0(SQ_FETCH_RESOURCE + tex_res->id * SQ_FETCH_RESOURCE_offset, 8);
848 PACK0(SQ_TEX_SAMPLER_WORD + s->id * SQ_TEX_SAMPLER_WORD_offset, 3);
887 PACK0(PA_SC_SCREEN_SCISSOR_T
[all...]
H A Dr6xx_accel.c212 PACK0(ib, SQ_CONFIG, 6);
447 PACK0(ib, SPI_PS_IN_CONTROL_0, 3);
552 PACK0(ib, SQ_ALU_CONSTANT + offset * SQ_ALU_CONSTANT_offset, countreg);
608 PACK0(ib, SQ_VTX_RESOURCE + res->id * SQ_VTX_RESOURCE_offset, 7);
701 PACK0(ib, SQ_TEX_RESOURCE + tex_res->id * SQ_TEX_RESOURCE_offset, 7);
758 PACK0(ib, SQ_TEX_SAMPLER_WORD + s->id * SQ_TEX_SAMPLER_WORD_offset, 3);
772 PACK0(ib, PA_SC_SCREEN_SCISSOR_TL, 2);
786 PACK0(ib, PA_SC_VPORT_SCISSOR_0_TL + id * PA_SC_VPORT_SCISSOR_0_TL_offset, 2);
801 PACK0(ib, PA_SC_GENERIC_SCISSOR_TL, 2);
816 PACK0(i
[all...]
H A Devergreen_state.h264 #define PACK0(reg, num) \ macro
295 PACK0((reg), 1); \
H A Dr600_state.h247 #define PACK0(ib, reg, num) \ macro
281 PACK0((ib), (reg), 1); \
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dcayman_accel.c68 PACK0(SQ_ESGS_RING_ITEMSIZE, 6);
76 PACK0(SQ_GS_VERT_ITEMSIZE, 4);
82 PACK0(SQ_VTX_BASE_VTX_LOC, 2);
107 PACK0(PA_SC_VPORT_ZMIN_0, 2);
111 PACK0(DB_RENDER_CONTROL, 5);
118 PACK0(DB_STENCIL_CLEAR, 2);
134 PACK0(SX_ALPHA_TEST_CONTROL, 5);
159 PACK0(PA_SC_MODE_CNTL_0, 2);
163 PACK0(PA_SC_CENTROID_PRIORITY_0, 27);
208 PACK0(PA_CL_CLIP_CNT
[all...]
H A Devergreen_accel.c184 PACK0(SQ_CONFIG, 4);
189 PACK0(SQ_THREAD_RESOURCE_MGMT, 5);
327 PACK0(CB_COLOR0_CLEAR_WORD0 + (0x3c * cb_conf->id), 4);
344 PACK0(CB_BLEND_RED, 4);
426 PACK0(SPI_PS_IN_CONTROL_0, 3);
496 PACK0(SQ_PGM_RESOURCES_VS, 2);
544 PACK0(SQ_PGM_RESOURCES_PS, 3);
669 PACK0(SQ_FETCH_RESOURCE + res->id * SQ_FETCH_RESOURCE_offset, 8);
782 PACK0(SQ_FETCH_RESOURCE + tex_res->id * SQ_FETCH_RESOURCE_offset, 8);
837 PACK0(SQ_TEX_SAMPLER_WOR
[all...]
H A Dr6xx_accel.c167 PACK0(SQ_CONFIG, 6);
182 PACK0(CB_BLEND_RED, 4);
378 PACK0(SPI_PS_IN_CONTROL_0, 3);
483 PACK0(SQ_ALU_CONSTANT + offset * SQ_ALU_CONSTANT_offset, countreg);
539 PACK0(SQ_VTX_RESOURCE + res->id * SQ_VTX_RESOURCE_offset, 7);
630 PACK0(SQ_TEX_RESOURCE + tex_res->id * SQ_TEX_RESOURCE_offset, 7);
687 PACK0(SQ_TEX_SAMPLER_WORD + s->id * SQ_TEX_SAMPLER_WORD_offset, 3);
701 PACK0(PA_SC_SCREEN_SCISSOR_TL, 2);
715 PACK0(PA_SC_VPORT_SCISSOR_0_TL + id * PA_SC_VPORT_SCISSOR_0_TL_offset, 2);
730 PACK0(PA_SC_GENERIC_SCISSOR_T
[all...]
H A Devergreen_state.h260 #define PACK0(reg, num) \ macro
291 PACK0((reg), 1); \
H A Dr600_state.h221 #define PACK0(reg, num) \ macro
255 PACK0((reg), 1); \

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