Searched refs:Part1Port (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dvb_setmode.c3328 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1A, tempbx & 0x07);
3333 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x16,
3335 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x17,
3364 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x15, tempax);
3365 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x14,
3380 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1b,
3382 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1c,
3388 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x1d,
3407 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x18,
3409 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part1Port,
[all...]
H A Dinit.c967 XGI_SetReg(XGI_Pr->Part1Port, 0x2f, 1); //yilin for crt2pitch it shoude modify if not colone mode
968 XGI_SetReg(XGI_Pr->Part1Port, 0x07, (HDisplay & 0xFF));
969 XGI_SetRegANDOR(XGI_Pr->Part1Port, 0x09, 0xF0, (HDisplay>>8));
H A Dvb_struct.h430 ULONG Part0Port,Part1Port,Part2Port; member in struct:_VB_DEVICE_INFO
439 USHORT Part0Port,Part1Port,Part2Port;
H A Dvb_ext.c358 flag = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x0 ) ;
H A Dvb_init.c469 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x00 , 0x00 ) ;
474 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port, 0x02,
478 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part1Port , 0x2E , 0x08 ) ; /* use VB */
2988 pVBInfo->Part1Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_04 ;
3477 pVBInfo->Part1Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_04 ;

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