Searched refs:Part4Port (Results 1 - 5 of 5) sorted by relevance

/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dvb_ext.c81 return !(XGI_GetReg((XGIIOADDRESS)pVBInfo->Part4Port, 0x01) > 0x0B0);
92 if ( ( XGI_GetReg( (XGIIOADDRESS) pVBInfo->Part4Port , 0x01 ) & 0xF0 ) == 0xC0 )
95 if ( XGI_GetReg( (XGIIOADDRESS) pVBInfo->Part4Port , 0x01 ) >= 0xD0 )
97 if ( XGI_GetReg( (XGIIOADDRESS) pVBInfo->Part4Port , 0x39 ) == 0xE0 )
116 XGI_SetReg((XGIIOADDRESS)pVBInfo->Part4Port, 0x11, (tempbx & 0x0FF));
118 XGI_SetRegANDOR((XGIIOADDRESS)pVBInfo->Part4Port, 0x10, ~0x1F,
124 temp = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x03);
205 XGI_SetRegOR((XGIIOADDRESS) pVBInfo->Part4Port , 0x0d , 0x04 ) ;
391 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port , 0x11 , temp ) ;
394 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part4Port ,
[all...]
H A Dvb_setmode.c3456 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x3c,
3458 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x3b,
3461 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part4Port, 0x3a, ~0xc0,
3466 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part4Port, 0x30,
3469 XGI_SetRegANDOR((XGIIOADDRESS) pVBInfo->Part4Port, 0x30,
3672 flag = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x00);
3675 flag = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x01);
3684 tempah = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part4Port,
3693 flag = XGI_GetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x23);
4943 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port,
[all...]
H A Dinit.c341 flag = XGI_GetReg(XGI_Pr->Part4Port,0x00);
345 rev = XGI_GetReg(XGI_Pr->Part4Port,0x01);
356 nolcd = XGI_GetReg(XGI_Pr->Part4Port,0x23);
364 flag = XGI_GetReg(XGI_Pr->Part4Port,0x39);
1049 backupp40d = XGI_GetReg(XGI_Pr->Part4Port,0x0d) & 0x08;
1064 XGI_SetRegANDOR(XGI_Pr->Part4Port,0x0d, ~0x08, backupp40d);
H A Dvb_struct.h431 ULONG Part3Port,Part4Port,Part5Port; member in struct:_VB_DEVICE_INFO
440 USHORT Part3Port,Part4Port,Part5Port;
H A Dvb_init.c509 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x0D, pVBInfo->CRT2Data_4_D);
510 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x0E, pVBInfo->CRT2Data_4_E);
511 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x10, pVBInfo->CRT2Data_4_10);
512 XGI_SetReg((XGIIOADDRESS) pVBInfo->Part4Port, 0x0F, 0x3F);
2991 pVBInfo->Part4Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_14 ;
3480 pVBInfo->Part4Port = pVBInfo->BaseAddr + XGI_CRT2_PORT_14 ;

Completed in 17 milliseconds