Searched refs:Port (Results 1 - 19 of 19) sorted by relevance

/xsrc/external/mit/xf86-video-vboxvideo/dist/src/
H A DVBoxVideoIPRT.h226 /** @name Port I/O helpers
230 #define VBVO_PORT_WRITE_U8(Port, Value) \
231 outb(Port, Value)
233 #define VBVO_PORT_WRITE_U16(Port, Value) \
234 outw(Port, Value)
236 #define VBVO_PORT_WRITE_U32(Port, Value) \
237 outl(Port, Value)
239 #define VBVO_PORT_READ_U8(Port) \
240 inb(Port)
242 #define VBVO_PORT_READ_U16(Port) \
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/xsrc/external/mit/xf86-video-glint/dist/src/
H A Dpm2_video.c175 PortPrivRec Port[PORTS]; member in struct:_AdaptorPrivRec
187 #define PORTNUM(p) ((int)((p) - &pAPriv->Port[0]))
547 xvipc.a = Plug - (pPPriv == &pAPriv->Port[1]);
552 if (pPPriv == &pAPriv->Port[0]) {
582 if (!xvipcHandshake(&pAPriv->Port[0], OP_VIDEOSTD, TRUE))
588 xf86I2CWriteByte(&pAPriv->Port[1].I2CDev, 0x61, 0xC2);
591 if (!xf86I2CWriteVec(&pAPriv->Port[0].I2CDev, &DecVS[VideoStd][0], 4)) {
597 if (!xf86I2CWriteVec(&pAPriv->Port[1].I2CDev, &EncVS[VideoStd][0], 7)) {
620 pAPriv->Port[0].FramesPerSec = pAPriv->FramesPerSec;
621 pAPriv->Port[
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/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dinit.c243 XGI_SetRegANDOR(XGIIOADDRESS Port,USHORT Index,USHORT DataAND,USHORT DataOR) argument
247 temp = XGI_GetReg(Port,Index);
249 XGI_SetReg(Port,Index,temp);
253 XGI_SetRegAND(XGIIOADDRESS Port,USHORT Index,USHORT DataAND) argument
257 temp = XGI_GetReg(Port,Index);
259 XGI_SetReg(Port,Index,temp);
263 XGI_SetRegOR(XGIIOADDRESS Port,USHORT Index,USHORT DataOR) argument
267 temp = XGI_GetReg(Port,Index);
269 XGI_SetReg(Port,Index,temp);
H A Dxgi.h1008 extern void XGI_SetRegANDOR(XGIIOADDRESS Port, USHORT Index, USHORT DataAND,
1010 extern void XGI_SetRegAND(XGIIOADDRESS Port, USHORT Index, USHORT DataAND);
1011 extern void XGI_SetRegOR(XGIIOADDRESS Port, USHORT Index, USHORT DataOR);
H A Dvb_init.c181 USHORT Port, PVB_DEVICE_INFO pVBInfo);
183 USHORT Port, PVB_DEVICE_INFO pVBInfo);
185 USHORT Port, PVB_DEVICE_INFO pVBInfo);
1252 USHORT Port, PVB_DEVICE_INFO pVBInfo)
1254 USHORT P3d4 = Port ,
1255 P3c4 = Port - 0x10 ;
1315 USHORT Port, PVB_DEVICE_INFO pVBInfo)
1317 USHORT P3d4 = Port ,
1318 P3c4 = Port - 0x10 ;
1371 USHORT Port, PVB_DEVICE_INF
1251 XGINew_DDR1x_DefaultRegister(PXGI_HW_DEVICE_INFO HwDeviceExtension,USHORT Port,PVB_DEVICE_INFO pVBInfo) argument
1314 XGINew_DDR2x_DefaultRegister(PXGI_HW_DEVICE_INFO HwDeviceExtension,USHORT Port,PVB_DEVICE_INFO pVBInfo) argument
1370 XGINew_DDR2_DefaultRegister(PXGI_HW_DEVICE_INFO HwDeviceExtension,USHORT Port,PVB_DEVICE_INFO pVBInfo) argument
1410 XGINew_SetDRAMDefaultRegister340(PXGI_HW_DEVICE_INFO HwDeviceExtension,USHORT Port,PVB_DEVICE_INFO pVBInfo) argument
1556 XGINew_SetDRAMDefaultRegisterXG45(PXGI_HW_DEVICE_INFO HwDeviceExtension,USHORT Port,PVB_DEVICE_INFO pVBInfo) argument
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/xsrc/external/mit/xf86-video-mach64/dist/src/
H A Datiprint.c95 const unsigned long Port,
113 if (Port == ATTRX)
115 xf86ErrorFVerb(4, "%02X", GetReg(Port, Index));
118 if (Port == ATTRX)
93 ATIPrintIndexedRegisters(const unsigned long Port,const CARD8 StartIndex,const CARD8 EndIndex,const char * Name,const unsigned long GenS1) argument
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D19.1.3.rst106 - anv: Set Stateless Data Port Access MOCS
H A D20.1.6.rst127 - nir/lower_idiv: Port recent LLVM fixes to emit_udiv
H A D21.1.2.rst145 - anv,iris: Port the D16 workaround stalls to BLORP
H A D20.3.0.rst197 - drisw: Port the MIT-SHM check to XCB
4568 - nir/lower_idiv: Port recent LLVM fixes to emit_udiv
H A D20.0.0.rst1101 - turnip: Port krh's packing macros from freedreno to tu.
H A D21.0.0.rst666 - pan/bi: Port bi_collect_blend_ret_addr() to the new compiler infra
H A D21.3.0.rst418 - panfrost: Port v5 blend shader issue to blitter
H A D20.2.0.rst4696 - nir/lower_idiv: Port recent LLVM fixes to emit_udiv
H A D21.2.0.rst4262 - anv,iris: Port the D16 workaround stalls to BLORP
/xsrc/external/mit/xf86-video-sis/dist/src/
H A Dinitextx.h476 extern void SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND,
H A Dinit.c930 SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND, unsigned short DataOR) argument
934 temp = SiS_GetReg(Port, Index);
936 SiS_SetReg(Port, Index, temp);
940 SiS_SetRegAND(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND) argument
944 temp = SiS_GetReg(Port, Index);
946 SiS_SetReg(Port, Index, temp);
950 SiS_SetRegOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataOR) argument
954 temp = SiS_GetReg(Port, Index);
956 SiS_SetReg(Port, Index, temp);
977 /* HELPER: Init Port Addresse
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H A Dinit.h1540 void SiS_SetRegANDOR(SISIOADDRESS Port, unsigned short Index, unsigned short DataAND,
1542 void SiS_SetRegAND(SISIOADDRESS Port,unsigned short Index, unsigned short DataAND);
1543 void SiS_SetRegOR(SISIOADDRESS Port,unsigned short Index, unsigned short DataOR);
/xsrc/external/mit/MesaLib/dist/
H A D.pick_status.json11047 "description": "intel/genxml: Add Un-Typed Data-Port Cache Flush field to pipe control",
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