Searched refs:QPU_SET_FIELD (Results 1 - 11 of 11) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu.c30 QPU_SET_FIELD(mux != QPU_MUX_SMALL_IMM ? mux : QPU_MUX_B, muxfield)
56 QPU_SET_FIELD(src.addr, QPU_RADDR_B));
67 inst |= QPU_SET_FIELD(QPU_A_NOP, QPU_OP_ADD);
68 inst |= QPU_SET_FIELD(QPU_M_NOP, QPU_OP_MUL);
71 inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_ADD);
72 inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_MUL);
73 inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
74 inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
75 inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
87 inst |= QPU_SET_FIELD(3
[all...]
H A Dvc4_qpu_defines.h231 #define QPU_SET_FIELD(value, field) \ macro
241 (((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))
H A Dvc4_qpu_emit.c214 *last_inst(block) |= QPU_SET_FIELD(inst->dst.pack, QPU_PACK);
310 unpack = QPU_SET_FIELD(qinst->src[i].pack,
624 QPU_SET_FIELD(QPU_SIG_LAST_THREAD_SWITCH,
H A Dvc4_qpu_schedule.c1061 QPU_SET_FIELD(branch_target, QPU_BRANCH_TARGET));
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu.c30 QPU_SET_FIELD(mux != QPU_MUX_SMALL_IMM ? mux : QPU_MUX_B, muxfield)
56 QPU_SET_FIELD(src.addr, QPU_RADDR_B));
67 inst |= QPU_SET_FIELD(QPU_A_NOP, QPU_OP_ADD);
68 inst |= QPU_SET_FIELD(QPU_M_NOP, QPU_OP_MUL);
71 inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_ADD);
72 inst |= QPU_SET_FIELD(QPU_W_NOP, QPU_WADDR_MUL);
73 inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_A);
74 inst |= QPU_SET_FIELD(QPU_R_NOP, QPU_RADDR_B);
75 inst |= QPU_SET_FIELD(QPU_SIG_NONE, QPU_SIG);
87 inst |= QPU_SET_FIELD(3
[all...]
H A Dvc4_qpu_defines.h231 #define QPU_SET_FIELD(value, field) \ macro
241 (((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))
H A Dvc4_qpu_emit.c214 *last_inst(block) |= QPU_SET_FIELD(inst->dst.pack, QPU_PACK);
310 unpack = QPU_SET_FIELD(qinst->src[i].pack,
624 QPU_SET_FIELD(QPU_SIG_LAST_THREAD_SWITCH,
H A Dvc4_qpu_schedule.c1061 QPU_SET_FIELD(branch_target, QPU_BRANCH_TARGET));
/xsrc/external/mit/MesaLib/dist/src/broadcom/qpu/
H A Dqpu_pack.c34 #define QPU_SET_FIELD(value, field) \ macro
44 (((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))
1192 *packed_instr |= QPU_SET_FIELD(mux_a, V3D_QPU_ADD_A);
1193 *packed_instr |= QPU_SET_FIELD(mux_b, V3D_QPU_ADD_B);
1194 *packed_instr |= QPU_SET_FIELD(opcode, V3D_QPU_OP_ADD);
1195 *packed_instr |= QPU_SET_FIELD(waddr, V3D_QPU_WADDR_A);
1298 *packed_instr |= QPU_SET_FIELD(mux_a, V3D_QPU_MUL_A);
1299 *packed_instr |= QPU_SET_FIELD(mux_b, V3D_QPU_MUL_B);
1301 *packed_instr |= QPU_SET_FIELD(opcode, V3D_QPU_OP_MUL);
1302 *packed_instr |= QPU_SET_FIELD(inst
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/qpu/
H A Dqpu_pack.c33 #define QPU_SET_FIELD(value, field) \ macro
43 (((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))
1144 *packed_instr |= QPU_SET_FIELD(mux_a, VC5_QPU_ADD_A);
1145 *packed_instr |= QPU_SET_FIELD(mux_b, VC5_QPU_ADD_B);
1146 *packed_instr |= QPU_SET_FIELD(opcode, VC5_QPU_OP_ADD);
1147 *packed_instr |= QPU_SET_FIELD(waddr, V3D_QPU_WADDR_A);
1252 *packed_instr |= QPU_SET_FIELD(mux_a, VC5_QPU_MUL_A);
1253 *packed_instr |= QPU_SET_FIELD(mux_b, VC5_QPU_MUL_B);
1255 *packed_instr |= QPU_SET_FIELD(opcode, VC5_QPU_OP_MUL);
1256 *packed_instr |= QPU_SET_FIELD(inst
[all...]
/xsrc/external/mit/libdrm/dist/vc4/
H A Dvc4_qpu_defines.h211 #define QPU_SET_FIELD(value, field) \ macro
221 (((inst) & ~(field ## _MASK)) | QPU_SET_FIELD(value, field))

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