Searched refs:R200_TXA_ARG_A_ZERO (Results 1 - 12 of 12) sorted by last modified time

/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_reg.h2924 # define R200_TXA_ARG_A_ZERO (0) macro
H A Dradeon_textured_videofuncs.c810 R200_TXA_ARG_A_ZERO |
831 R200_TXA_ARG_A_ZERO |
853 R200_TXA_ARG_A_ZERO |
912 R200_TXA_ARG_A_ZERO |
934 R200_TXA_ARG_A_ZERO |
957 R200_TXA_ARG_A_ZERO |
/xsrc/external/mit/xf86-video-ati-kms/dist/src/
H A Dradeon_reg.h2924 # define R200_TXA_ARG_A_ZERO (0) macro
H A Dradeon_textured_videofuncs.c637 R200_TXA_ARG_A_ZERO |
658 R200_TXA_ARG_A_ZERO |
680 R200_TXA_ARG_A_ZERO |
739 R200_TXA_ARG_A_ZERO |
761 R200_TXA_ARG_A_ZERO |
784 R200_TXA_ARG_A_ZERO |
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/r200/
H A Dr200_texstate.c183 R200_TXA_ARG_A_ZERO,
184 R200_TXA_ARG_A_ZERO | R200_TXA_COMP_ARG_A,
185 R200_TXA_ARG_A_ZERO,
253 alpha_combine = R200_TXA_ARG_A_ZERO | R200_TXA_ARG_B_ZERO
543 alpha_combine = (R200_TXA_ARG_A_ZERO |
H A Dr200_blit.c163 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
190 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
224 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
240 OUT_BATCH_REGVAL(R200_PP_TXABLEND_1, (R200_TXA_ARG_A_ZERO |
256 OUT_BATCH_REGVAL(R200_PP_TXABLEND_2, (R200_TXA_ARG_A_ZERO |
270 OUT_BATCH_REGVAL(R200_PP_TXABLEND_3, (R200_TXA_ARG_A_ZERO |
H A Dr200_reg.h1283 #define R200_TXA_ARG_A_ZERO (0) macro
H A Dr200_state_init.c1107 (R200_TXA_ARG_A_ZERO |
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/r200/
H A Dr200_texstate.c183 R200_TXA_ARG_A_ZERO,
184 R200_TXA_ARG_A_ZERO | R200_TXA_COMP_ARG_A,
185 R200_TXA_ARG_A_ZERO,
253 alpha_combine = R200_TXA_ARG_A_ZERO | R200_TXA_ARG_B_ZERO
543 alpha_combine = (R200_TXA_ARG_A_ZERO |
H A Dr200_blit.c176 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
200 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
234 OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO |
250 OUT_BATCH_REGVAL(R200_PP_TXABLEND_1, (R200_TXA_ARG_A_ZERO |
266 OUT_BATCH_REGVAL(R200_PP_TXABLEND_2, (R200_TXA_ARG_A_ZERO |
280 OUT_BATCH_REGVAL(R200_PP_TXABLEND_3, (R200_TXA_ARG_A_ZERO |
H A Dr200_reg.h1283 #define R200_TXA_ARG_A_ZERO (0) macro
H A Dr200_state_init.c1107 (R200_TXA_ARG_A_ZERO |

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