Searched refs:R600_CONTEXT_REG_OFFSET (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dr600_cs.h133 assert(reg < R600_CONTEXT_REG_OFFSET);
147 assert(reg >= R600_CONTEXT_REG_OFFSET);
150 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2);
163 assert(reg >= R600_CONTEXT_REG_OFFSET);
166 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
H A Dr600d_common.h30 #define R600_CONTEXT_REG_OFFSET 0x28000 macro
H A Dr600_pipe.h870 #define R600_CONTEXT_REG_OFFSET 0x28000 macro
900 assert(reg < R600_CONTEXT_REG_OFFSET);
912 assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
915 cb->buf[cb->num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600_cs.h133 assert(reg < R600_CONTEXT_REG_OFFSET);
147 assert(reg >= R600_CONTEXT_REG_OFFSET);
150 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2);
163 assert(reg >= R600_CONTEXT_REG_OFFSET);
166 radeon_emit(cs, (reg - R600_CONTEXT_REG_OFFSET) >> 2 | (idx << 28));
H A Dr600d_common.h30 #define R600_CONTEXT_REG_OFFSET 0x28000 macro
H A Dr600_pipe.h876 #define R600_CONTEXT_REG_OFFSET 0x28000 macro
906 assert(reg < R600_CONTEXT_REG_OFFSET);
918 assert(reg >= R600_CONTEXT_REG_OFFSET && reg < R600_CTL_CONST_OFFSET);
921 cb->buf[cb->num_dw++] = (reg - R600_CONTEXT_REG_OFFSET) >> 2;

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