Searched refs:RADEON_PP_TXABLEND_0 (Results 1 - 13 of 13) sorted by relevance
| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_blit.c | 141 OUT_BATCH_REGVAL(RADEON_PP_TXABLEND_0, (RADEON_ALPHA_ARG_A_ZERO |
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| H A D | radeon_sanity.c | 205 { RADEON_PP_TXABLEND_0, "RADEON_PP_TXABLEND_0" },
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_blit.c | 132 OUT_BATCH_REGVAL(RADEON_PP_TXABLEND_0, (RADEON_ALPHA_ARG_A_ZERO |
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| H A D | radeon_sanity.c | 205 { RADEON_PP_TXABLEND_0, "RADEON_PP_TXABLEND_0" },
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| /xsrc/external/mit/xf86-video-ati/dist/src/ |
| H A D | radeon_render.c | 539 OUT_ACCEL_REG(RADEON_PP_TXABLEND_0, RADEON_ALPHA_ARG_A_TFACTOR_ALPHA |
588 OUT_ACCEL_REG(RADEON_PP_TXABLEND_0, RADEON_ALPHA_ARG_C_T0_ALPHA);
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| H A D | radeon_textured_videofuncs.c | 242 OUT_ACCEL_REG(RADEON_PP_TXABLEND_0,
326 OUT_ACCEL_REG(RADEON_PP_TXABLEND_0,
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| H A D | radeon_exa_render.c | 730 OUT_ACCEL_REG(RADEON_PP_TXABLEND_0, ablend);
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| H A D | radeon_reg.h | 2048 #define RADEON_PP_TXABLEND_0 0x1c64 macro
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| /xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/radeon/server/ |
| H A D | radeon_reg.h | 1456 #define RADEON_PP_TXABLEND_0 0x1c64 macro
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| /xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/radeon/server/ |
| H A D | radeon_reg.h | 1456 #define RADEON_PP_TXABLEND_0 0x1c64 macro
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| /xsrc/external/mit/xf86-video-ati-kms/dist/src/ |
| H A D | radeon_textured_videofuncs.c | 164 OUT_RING_REG(RADEON_PP_TXABLEND_0,
248 OUT_RING_REG(RADEON_PP_TXABLEND_0,
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| H A D | radeon_exa_render.c | 681 OUT_RING_REG(RADEON_PP_TXABLEND_0, ablend);
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| H A D | radeon_reg.h | 2048 #define RADEON_PP_TXABLEND_0 0x1c64 macro
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