| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_opcodes.h | 132 RC_OPCODE_MUL, enumerator in enum:__anon28d1b50a0103
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| H A D | radeon_pair_translate.c | 72 case RC_OPCODE_MUL:
110 case RC_OPCODE_MUL:
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| H A D | radeon_program_tex.c | 67 inst_mov->U.I.Opcode = RC_OPCODE_MUL;
100 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
191 inst_mul->U.I.Opcode = inst->U.I.Opcode == RC_OPCODE_TXP ? RC_OPCODE_MUL : RC_OPCODE_MOV;
330 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
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| H A D | radeon_program_alu.c | 308 emit2(c, inst->Prev, RC_OPCODE_MUL, &inst->U.I, inst->U.I.DstReg,
402 emit2(c, inst->Prev, RC_OPCODE_MUL, 0,
449 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, tempdst, tempsrc, swizzle_xxxx(inst->U.I.SrcReg[1]));
633 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dst,
799 emit2(c, inst->Prev, RC_OPCODE_MUL, 0,
980 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dstregtmpmask(tempreg, RC_MASK_XY),
1137 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dstregtmpmask(temp, RC_MASK_W),
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| H A D | radeon_opcodes.c | 234 .Opcode = RC_OPCODE_MUL,
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| H A D | radeon_optimize.c | 234 inst->U.I.Opcode = RC_OPCODE_MUL;
409 if (inst->U.I.Opcode == RC_OPCODE_MUL)
903 if (cur->U.I.Opcode == RC_OPCODE_MUL) {
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| H A D | radeon_compiler.c | 262 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
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| H A D | r3xx_vertprog.c | 422 case RC_OPCODE_MUL: ei_vector2(compiler->code, VE_MULTIPLY, vpi, inst); break;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/compiler/ |
| H A D | radeon_opcodes.h | 132 RC_OPCODE_MUL, enumerator in enum:__anon497cc89d0103
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| H A D | radeon_pair_translate.c | 74 case RC_OPCODE_MUL:
112 case RC_OPCODE_MUL:
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| H A D | radeon_program_tex.c | 67 inst_mov->U.I.Opcode = RC_OPCODE_MUL;
100 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
191 inst_mul->U.I.Opcode = inst->U.I.Opcode == RC_OPCODE_TXP ? RC_OPCODE_MUL : RC_OPCODE_MOV;
330 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
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| H A D | radeon_program_alu.c | 308 emit2(c, inst->Prev, RC_OPCODE_MUL, &inst->U.I, inst->U.I.DstReg,
402 emit2(c, inst->Prev, RC_OPCODE_MUL, 0,
449 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, tempdst, tempsrc, swizzle_xxxx(inst->U.I.SrcReg[1]));
633 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dst,
799 emit2(c, inst->Prev, RC_OPCODE_MUL, 0,
980 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dstregtmpmask(tempreg, RC_MASK_XY),
1137 emit2(c, inst->Prev, RC_OPCODE_MUL, 0, dstregtmpmask(temp, RC_MASK_W),
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| H A D | radeon_opcodes.c | 236 .Opcode = RC_OPCODE_MUL,
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| H A D | radeon_optimize.c | 236 inst->U.I.Opcode = RC_OPCODE_MUL;
411 if (inst->U.I.Opcode == RC_OPCODE_MUL)
913 if (cur->U.I.Opcode == RC_OPCODE_MUL) {
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| H A D | radeon_compiler.c | 262 inst_mul->U.I.Opcode = RC_OPCODE_MUL;
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| H A D | r3xx_vertprog.c | 425 case RC_OPCODE_MUL: ei_vector2(compiler->code, VE_MULTIPLY, vpi, inst); break;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r300/ |
| H A D | r300_tgsi_to_rc.c | 43 case TGSI_OPCODE_MUL: return RC_OPCODE_MUL;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r300/ |
| H A D | r300_tgsi_to_rc.c | 45 case TGSI_OPCODE_MUL: return RC_OPCODE_MUL;
|