Searched refs:RISC_RA (Results 1 - 1 of 1) sorted by relevance
| /xsrc/external/mit/xf86-video-rendition/dist/src/ |
| H A D | v1krisc.c | 27 #define RISC_RA 254 /* RISC program link/scratch register */ macro
228 writeRF(io_base, RISC_RA, ICACHE_ONOFF_MASK); /* load mask */
230 risc_forcestep(io_base, INT_INSTR(OR_OP, RISC_FLAG, RISC_FLAG, RISC_RA));
239 writeRF(io_base, RISC_RA, ICACHE_ONOFF_MASK); /* load mask */
241 risc_forcestep(io_base, INT_INSTR(ANDN_OP, RISC_FLAG, RISC_FLAG, RISC_RA));
272 risc_forcestep(io_base, LI_INSTR(LI_OP, RISC_RA, ICACHE_ONOFF_MASK&0xffff));
273 risc_forcestep(io_base, INT_INSTR(ADDIFI_OP, RISC_FLAG, RISC_RA,
429 writeRF(io_base, RISC_RA, addr); /* point to memory */
431 risc_forcestep(io_base, LD_INSTR(LB_OP, RISC_SP, 0, RISC_RA));
434 risc_forcestep(io_base, LD_INSTR(LH_OP, RISC_SP, 0, RISC_RA));
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