Searched refs:R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ (Results 1 - 12 of 12) sorted by relevance

/xsrc/external/mit/MesaLib.old/src/gallium/drivers/r600/
H A Degd_tables.h943 {15234, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ},
/xsrc/external/mit/MesaLib/src/gallium/drivers/r600/
H A Degd_tables.h943 {15234, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ},
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Devergreen_compute.c777 radeon_set_config_reg(cs, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (1 << 8));
H A Dr600_state.c2309 r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00004000);
2314 r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0);
H A Devergreen_state.c990 radeon_set_config_reg(cs, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (a->dyn_gpr_enabled << 8));
2720 r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (1 << 8));
H A Devergreend.h1884 #define R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x00008D8C macro
H A Dr600d.h2765 #define R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x008D8C macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Devergreen_compute.c805 radeon_set_config_reg(cs, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (1 << 8));
H A Dr600_state.c2312 r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0x00004000);
2317 r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, 0);
H A Devergreen_state.c996 radeon_set_config_reg(cs, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (a->dyn_gpr_enabled << 8));
2726 r600_store_config_reg(cb, R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ, (1 << 8));
H A Devergreend.h1884 #define R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x00008D8C macro
H A Dr600d.h2765 #define R_008D8C_SQ_DYN_GPR_CNTL_PS_FLUSH_REQ 0x008D8C macro

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