| /xsrc/external/mit/MesaLib.old/src/gallium/drivers/r600/ |
| H A D | egd_tables.h | 871 {13451, R_028240_PA_SC_GENERIC_SCISSOR_TL, 3, 256},
|
| /xsrc/external/mit/MesaLib/src/gallium/drivers/r600/ |
| H A D | egd_tables.h | 871 {13451, R_028240_PA_SC_GENERIC_SCISSOR_TL, 3, 256},
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 213 radeon_set_context_reg(cs, R_028240_PA_SC_GENERIC_SCISSOR_TL,
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 235 radeon_set_context_reg(cs, R_028240_PA_SC_GENERIC_SCISSOR_TL,
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| H A D | r600d.h | 1027 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
2207 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
2492 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
2890 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
|
| H A D | evergreen_state.c | 2828 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
2829 r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
3237 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
3238 r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
|
| H A D | evergreend.h | 1183 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
|
| H A D | r600_state.c | 2402 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
2403 r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| H A D | r600d.h | 1027 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
2207 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
2492 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
2890 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
|
| H A D | evergreen_state.c | 2834 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
2835 r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
3243 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
3244 r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
|
| H A D | evergreend.h | 1183 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
|
| H A D | r600_state.c | 2405 r600_store_context_reg_seq(cb, R_028240_PA_SC_GENERIC_SCISSOR_TL, 2);
2406 r600_store_value(cb, 0); /* R_028240_PA_SC_GENERIC_SCISSOR_TL */
|
| /xsrc/external/mit/MesaLib.old/src/amd/common/ |
| H A D | sid_tables.h | 865 {16197, R_028240_PA_SC_GENERIC_SCISSOR_TL, 3, 1303},
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state.c | 4980 si_pm4_set_reg(pm4, R_028240_PA_SC_GENERIC_SCISSOR_TL, S_028240_WINDOW_OFFSET_DISABLE(1));
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_state.c | 5360 si_pm4_set_reg(pm4, R_028240_PA_SC_GENERIC_SCISSOR_TL, S_028240_WINDOW_OFFSET_DISABLE(1));
|
| /xsrc/external/mit/MesaLib.old/dist/src/amd/common/ |
| H A D | gfx9d.h | 4231 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
|
| H A D | sid.h | 5439 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
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| /xsrc/external/mit/MesaLib/src/amd/common/ |
| H A D | amdgfxregs.h | 8940 #define R_028240_PA_SC_GENERIC_SCISSOR_TL 0x028240 macro
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