Searched refs:S5_STENCIL_REF_SHIFT (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_state_immediate.c133 LIS5 |= i915->stencil_ref.ref_value[0] << S5_STENCIL_REF_SHIFT;
H A Di915_reg.h402 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h149 #define S5_STENCIL_REF_SHIFT 16 macro
H A Di915_state.c121 (front_ref << S5_STENCIL_REF_SHIFT) |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_state_immediate.c126 LIS5 |= i915->stencil_ref.ref_value[stencil_ccw] << S5_STENCIL_REF_SHIFT;
H A Di915_reg.h381 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h149 #define S5_STENCIL_REF_SHIFT 16 macro
H A Di915_state.c121 (front_ref << S5_STENCIL_REF_SHIFT) |
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_reg.h406 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_reg.h406 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_reg.h406 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_reg.h406 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_reg.h422 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h409 #define S5_STENCIL_REF_SHIFT 16 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h409 #define S5_STENCIL_REF_SHIFT 16 macro

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