Searched refs:S6_DEPTH_TEST_ENABLE (Results 1 - 19 of 19) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h170 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
H A Di915_state.c831 dw |= S6_DEPTH_TEST_ENABLE;
833 dw &= ~S6_DEPTH_TEST_ENABLE;
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Dintel_reg.h170 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
H A Di915_state.c831 dw |= S6_DEPTH_TEST_ENABLE;
833 dw &= ~S6_DEPTH_TEST_ENABLE;
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di915_structs.h844 #define S6_DEPTH_TEST_ENABLE (1 << 19) macro
H A Di915_reg.h426 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
H A Di915_xvmc.c345 s6_dword = S6_COLOR_BUFFER_WRITE | S6_DEPTH_TEST_ENABLE;
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di915_structs.h844 #define S6_DEPTH_TEST_ENABLE (1 << 19) macro
H A Di915_reg.h426 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
H A Di915_xvmc.c345 s6_dword = S6_COLOR_BUFFER_WRITE | S6_DEPTH_TEST_ENABLE;
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_reg.h426 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_reg.h426 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di915_reg.h443 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_reg.h423 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
H A Di915_state.c531 cso->depth_LIS6 |= (S6_DEPTH_TEST_ENABLE |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_reg.h401 #define S6_DEPTH_TEST_ENABLE (1 << 19) macro
H A Di915_state.c483 (S6_DEPTH_TEST_ENABLE | (func << S6_DEPTH_TEST_FUNC_SHIFT));
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h429 #define S6_DEPTH_TEST_ENABLE (1<<19) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h429 #define S6_DEPTH_TEST_ENABLE (1<<19) macro

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