Searched refs:SC1200_DCFG_PWR_SEQ_DLY_MASK (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/xf86-video-nsc/dist/src/gfx/
H A Dgfx_regs.h526 #define SC1200_DCFG_PWR_SEQ_DLY_MASK 0x000E0000 macro
H A Dvid_1200.c382 dcfg &= ~(SC1200_DCFG_CRT_SYNC_SKW_MASK | SC1200_DCFG_PWR_SEQ_DLY_MASK |
/xsrc/external/mit/xf86-video-geode/dist/src/gfx/
H A Dgfx_regs.h427 #define SC1200_DCFG_PWR_SEQ_DLY_MASK 0x000E0000 macro
H A Dvid_1200.c223 dcfg &= ~(SC1200_DCFG_CRT_SYNC_SKW_MASK | SC1200_DCFG_PWR_SEQ_DLY_MASK |

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