Searched refs:SLMEnable (Results 1 - 18 of 18) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_state.c381 l3cr.SLMEnable = cfg->n[INTEL_L3P_SLM];
440 l3cr2.SLMEnable = cfg->n[INTEL_L3P_SLM];
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A DgenX_cmd_buffer.c1633 .SLMEnable = has_slm,
1687 .SLMEnable = has_slm,
/xsrc/external/mit/MesaLib.old/src/intel/genxml/
H A Dgen7_pack.h6879 uint32_t SLMEnable; member in struct:GEN7_L3CNTLREG2
6897 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen10_pack.h10559 bool SLMEnable; member in struct:GEN10_L3CNTLREG
10574 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen11_pack.h10686 uint32_t SLMEnable; member in struct:GEN11_L3CNTLREG
10703 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen75_pack.h8200 uint32_t SLMEnable; member in struct:GEN75_L3CNTLREG2
8217 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen8_pack.h9079 bool SLMEnable; member in struct:GEN8_L3CNTLREG
9094 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen9_pack.h10692 bool SLMEnable; member in struct:GEN9_L3CNTLREG
10707 __gen_uint(values->SLMEnable, 0, 0) |
/xsrc/external/mit/MesaLib/src/intel/genxml/
H A Dgen7_pack.h6895 bool SLMEnable; member in struct:GFX7_L3CNTLREG2
6913 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen10_pack.h10559 bool SLMEnable; member in struct:GEN10_L3CNTLREG
10574 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen75_pack.h8216 bool SLMEnable; member in struct:GFX75_L3CNTLREG2
8233 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen8_pack.h9095 bool SLMEnable; member in struct:GFX8_L3CNTLREG
9110 __gen_uint(values->SLMEnable, 0, 0) |
H A Dgen9_pack.h10739 bool SLMEnable; member in struct:GFX9_L3CNTLREG
10754 __gen_uint(values->SLMEnable, 0, 0) |
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/crocus/
H A Dcrocus_state.c1115 reg.SLMEnable = cfg->n[INTEL_L3P_SLM] > 0;
1153 reg.SLMEnable = has_slm;
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D20.0.0.rst1753 - intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
1754 - iris: Set SLMEnable based on the L3$ config
H A D20.1.0.rst2331 - intel/genxml: Drop SLMEnable from L3CNTLREG on Gen11
2332 - iris: Set SLMEnable based on the L3$ config
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/iris/
H A Diris_state.c627 reg.SLMEnable = has_slm;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_state.c760 reg.SLMEnable = cfg->n[INTEL_L3P_SLM] > 0;

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