Searched refs:SR32 (Results 1 - 6 of 6) sorted by relevance
| /xsrc/external/mit/xf86-video-siliconmotion/dist/src/ |
| H A D | smilynx_hw.c | 91 mode->SR32 &= ~0x03;
94 mode->SR32 |= 0x04;
96 mode->SR32 &= ~0x04;
128 VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, mode->SR32);
188 save->SR32 = VGAIN8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32);
348 VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, restore->SR32);
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| H A D | smi.h | 143 CARD8 SR30, SR31, SR32, SR34; member in struct:__anon910553c20108
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| H A D | smilynx_crtc.c | 532 reg->SR32 &= ~0x18;
534 reg->SR32 |= 0x18;
537 reg->SR32 |= 0x18;
541 VGAOUT8_INDEX(pSmi, VGA_SEQ_INDEX, VGA_SEQ_DATA, 0x32, reg->SR32);
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| /xsrc/external/mit/xf86-video-xgi/dist/src/ |
| H A D | vb_struct.h | 499 UCHAR SR32; member in struct:_VB_DEVICE_INFO
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| H A D | vb_init.c | 488 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x32, (pVBInfo->SR32 & 0xFC) | 0x01);
492 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4, 0x32, pVBInfo->SR32);
2909 /* [Vicent] 2004/07/07, When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */
2910 /* [Hsuan] 2004/08/20, Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz, Set SR32 D[1:0] = 10b */
3117 pVBInfo->SR32 = pVideoMemory[0x7C];
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| H A D | vb_setmode.c | 348 pVBInfo->SR32 = XGI330_SR32;
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