Searched refs:STENCILOP_ZERO (Results 1 - 25 of 44) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Dintel_state.c97 return STENCILOP_ZERO;
111 return STENCILOP_ZERO;
H A Dintel_context.h375 #define STENCILOP_ZERO 0x1 macro
H A Di830_state.c111 fop = STENCILOP_ZERO;
139 dfop = STENCILOP_ZERO;
167 dpop = STENCILOP_ZERO;
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Dintel_state.c97 return STENCILOP_ZERO;
111 return STENCILOP_ZERO;
H A Dintel_context.h375 #define STENCILOP_ZERO 0x1 macro
H A Di830_state.c111 fop = STENCILOP_ZERO;
139 dfop = STENCILOP_ZERO;
167 dpop = STENCILOP_ZERO;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_state_inlines.h94 return STENCILOP_ZERO;
108 return STENCILOP_ZERO;
H A Di915_reg.h937 #define STENCILOP_ZERO 0x1 macro
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_state_inlines.h93 return STENCILOP_ZERO;
107 return STENCILOP_ZERO;
H A Di915_reg.h903 #define STENCILOP_ZERO 0x1 macro
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/
H A Dswr_state.h166 return STENCILOP_ZERO;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/swr/
H A Dswr_state.h189 return STENCILOP_ZERO;
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/swr/rasterizer/core/core/
H A Ddepthstencil.h44 case STENCILOP_ZERO:
H A Dstate.h468 STENCILOP_ZERO, enumerator in enum:SWR_STENCILOP
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen8_render.h473 #define STENCILOP_ZERO 1 macro
H A Dgen9_render.h482 #define STENCILOP_ZERO 1 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen8_render.h472 #define STENCILOP_ZERO 1 macro
/xsrc/external/mit/MesaLib.old/dist/src/intel/vulkan/
H A DgenX_pipeline.c676 [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO,
/xsrc/external/mit/MesaLib.old/src/intel/genxml/
H A Dgen45_pack.h255 STENCILOP_ZERO = 1, enumerator in enum:GEN45_3D_Stencil_Operation
H A Dgen4_pack.h255 STENCILOP_ZERO = 1, enumerator in enum:GEN4_3D_Stencil_Operation
H A Dgen5_pack.h255 STENCILOP_ZERO = 1, enumerator in enum:GEN5_3D_Stencil_Operation
/xsrc/external/mit/MesaLib/src/intel/genxml/
H A Dgen45_pack.h271 STENCILOP_ZERO = 1, enumerator in enum:GFX45_3D_Stencil_Operation
H A Dgen4_pack.h271 STENCILOP_ZERO = 1, enumerator in enum:GFX4_3D_Stencil_Operation
H A Dgen5_pack.h271 STENCILOP_ZERO = 1, enumerator in enum:GFX5_3D_Stencil_Operation
/xsrc/external/mit/MesaLib/dist/src/intel/vulkan/
H A DgenX_pipeline.c933 [VK_STENCIL_OP_ZERO] = STENCILOP_ZERO,

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