Searched refs:TES (Results 1 - 25 of 31) sorted by relevance

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/xsrc/external/mit/MesaLib/dist/src/amd/compiler/
H A DREADME.md127 * TES = Tessellation Evaluation Shader, equivalent to D3D DS = Domain Shader
136 * ES = Export Shader (merged into GS on GFX9+), if there is a GS in the SW pipeline, the preceding stage (ie. SW VS or SW TES) always has to run on this HW stage
179 | with tess: | VS | TCS | | | TES | FS | `vertex_ls`, `tess_control_hs`, `tess_eval_vs`, `fragment_fs` |
181 | with both: | VS | TCS | TES | GS | GS copy| FS | `vertex_ls`, `tess_control_hs`, `tess_eval_es`, `geometry_gs`, `gs_copy_vs`, `fragment_fs` |
192 | with tess: | VS + TCS | | TES | FS | `vertex_tess_control_hs`, `tess_eval_vs`, `fragment_fs` |
194 | with both: | VS + TCS | TES + GS | GS copy| FS | `vertex_tess_control_hs`, `tess_eval_geometry_gs`, `gs_copy_vs`, `fragment_fs` |
204 | with tess: | VS + TCS | TES | FS | `vertex_tess_control_hs`, `tess_eval_ngg`, `fragment_fs` |
206 | with both: | VS + TCS | TES + GS | FS | `vertex_tess_control_hs`, `tess_eval_geometry_ngg`, `fragment_fs` |
H A Daco_instruction_selection_setup.cpp829 case MESA_SHADER_TESS_EVAL: sw_stage = sw_stage | SWStage::TES; break;
865 else if (sw_stage == SWStage::TES && !args->shader_info->tes.as_es && !ngg)
866 hw_stage = HWStage::VS; /* GFX6-9: TES without GS uses the HW VS stage (and GFX10/legacy) */
867 else if (sw_stage == SWStage::TES && !args->shader_info->tes.as_es && ngg)
868 hw_stage = HWStage::NGG; /* GFX10/NGG: TES without GS */
869 else if (sw_stage == SWStage::TES && args->shader_info->tes.as_es && !ngg)
870 hw_stage = HWStage::ES; /* GFX6-8: TES is an Export Shader */
872 hw_stage = HWStage::GS; /* GFX9: TES+GS merged into a GS (and GFX10/legacy) */
874 hw_stage = HWStage::NGG; /* GFX10+: TES+GS merged into an NGG GS */
H A Daco_ir.h1912 TES = 1 << 3, /* Tessellation Evaluation aka Domain Shader */ enumerator in enum:aco::SWStage
1920 TES_GS = TES | GS,
1938 ES, /* Export shader: pre-GS (VS or TES) on GFX6-8. Combined into GS on GFX9 (and GFX10/legacy). */
1940 NGG, /* Primitive shader, used to implement VS, TES, GS. */
1979 static constexpr Stage tess_eval_vs(HWStage::VS, SWStage::TES);
1984 static constexpr Stage tess_eval_ngg(HWStage::NGG, SWStage::TES);
1995 SWStage::TES); /* tesselation evaluation before geometry */
H A Daco_instruction_selection.cpp4739 /* For NGG VS and TES shaders the primitive ID is exported manually after the other exports so we
4742 (ctx->stage.has(SWStage::VS) || ctx->stage.has(SWStage::TES)) &&
7070 * - when GS is used on GFX9+, VS->GS and TES->GS I/O is lowered to shared memory
10642 int offset = (ctx->stage.has(SWStage::TES) && !ctx->stage.has(SWStage::GS))
10745 const radv_vs_output_info* outinfo = (ctx->stage.has(SWStage::TES) && !ctx->stage.has(SWStage::GS))
10753 if (ctx->stage.has(SWStage::TES))
11572 (program->stage.has(SWStage::VS) || program->stage.has(SWStage::TES))) {
/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D17.3.8.rst62 - anv/pipeline: fail if TCS/TES compile fail
H A D18.1.5.rst77 - r600: enable tess_input_info for TES
H A D20.1.9.rst127 - radv,aco: fix reading primitive ID in FS after TES
H A D21.1.4.rst156 - aco/gfx10: Emit barrier at the start of NGG VS and TES.
H A D11.0.3.rst116 - radeonsi: skip drawing if VS, TCS, TES, GS fail to compile or upload
H A D17.0.1.rst137 - mesa: Do (TCS && !TES) draw time validation in ES as well.
H A D17.1.2.rst119 - cherry-ignore: radeonsi: load patch_id for TES-as-ES when exporting
H A D17.2.6.rst135 - i965: Make L3 configuration atom listen for TCS/TES program updates.
H A D18.0.1.rst83 - anv/pipeline: fail if TCS/TES compile fail
H A D20.0.3.rst179 - nir: fix packing of TCS varyings not read by the TES
H A D20.1.0.rst1392 - draw/tess: fix TES patch vertices in.
4126 - nir: fix packing of TCS varyings not read by the TES
4164 - aco: Implement load_view_index for TCS and TES.
4181 - aco: Use TES output info when TES runs on the VS stage.
4182 - aco: Store TES outputs when TES runs on the HW VS stage.
4183 - aco: Enable streamout when TES runs on the HW VS stage.
4184 - aco: Implement loading TES inputs.
4185 - radv: Enable ACO for TES whe
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H A D13.0.6.rst190 - mesa: Do (TCS && !TES) draw time validation in ES as well.
H A D20.0.0.rst2009 - freedreno/ir3: End TES with chsh when using GS
2197 - st/mesa: print TCS/TES/GS/CS TGSI in the right place & keep disk
2270 - st/mesa: propagate gl_PatchVerticesIn from TCS to TES before linking
2332 - radeonsi/gfx10: improve performance for TES using PrimID but not
2430 - radeonsi/gfx10: export primitives at the beginning of VS/TES
3037 - radv: declare NGG scratch for VS or TES and only on GFX10
3150 - radv/gfx10: improve performance for TES using PrimID but not
H A D19.3.0.rst2098 - iris: Skip double-disabling TCS/TES/GS after BLORP operations
2450 - st/mesa: sink TCS/TES/GS/CS translate code into
2458 - st/mesa: finalize NIR after shader variant passes for TCS/TES/GS/CS
3092 - radv/gfx10: determine the number of vertices per primitive for TES
3109 - radv/gfx10: adjust the LDS size for VS/TES NGG streamout
3123 - radv/gfx10: fix storing/loading NGG stream outputs for VS and TES
H A D20.3.0.rst3531 - radeonsi: write VS/TES system values into LDS after culling
4041 - radv,aco: fix reading primitive ID in FS after TES
4342 - radv: gather output usage mask from store_output for VS, TES and GS
4348 - radv/llvm: assign driver locations for VS, TCS, TES and GS correctly
4350 - radv/llvm: lower TES IO
4359 - radeonsi: remove dead code in TCS/TES/GS since const_index is always 0
4521 - aco/ngg: Clean up and reorganize NGG VS/TES code.
4681 - gallium/swr: Fix compilation TCS/TES compilation issues
H A D19.1.0.rst2681 - iris: TES stash
2809 - iris: TES uniform fixes
2856 - iris: TES program key inputs
3102 - iris: Fix TCS/TES slot unification
3304 - iris: Fix TES gl_PatchVerticesIn handling.
H A D21.3.0.rst1342 - freedreno/ir3: Apply the a6xx samgq workaround to TES/TCS/GS as well.
2700 - radeonsi: don't set edgeflags for TES and blit VS
3888 - radv: add export_clip_dists for VS and TES to radv_shader_info
3934 - radv: determine the ES type (VS or TES) for GS earlier
H A D21.1.0.rst2175 - r600/sfn: Fix loading TES gl_PatchVerticesIn
3511 - ac/llvm: add type parameter into ac_build_buffer_load to fix 16-bit TES inputs
5383 - ac: Add NIR passes to lower VS->TCS->TES I/O to memory accesses.
5400 - aco: Use s_setprio 3 at the beginning of every VS and TES.
5403 - aco: Emit fewer branches for NGG VS/TES with late primitive export.
H A D21.2.0.rst3431 - gallium/u_threaded: track whether TCS, TES, or GS have ever been used
3531 - radeonsi: don't compile TES and GS draw_vbo variants for the prim discard CS
4986 - ac: Add new NIR pass to lower NGG VS/TES.
4987 - radv: Use new NGG NIR lowering for VS/TES when ACO is used.
5027 - aco/gfx10: Emit barrier at the start of NGG VS and TES.
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_pipe.c51 { "tes", DBG(TES), "Print tessellation evaluation shaders" },
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_pipe.c57 {"tes", DBG(TES), "Print tessellation evaluation shaders"},

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