Searched refs:TGSI_WRITEMASK_W (Results 1 - 25 of 76) sorted by relevance

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/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_aa_point.c171 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
183 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
199 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
250 TGSI_WRITEMASK_W,
H A Dtgsi_util.c255 TGSI_WRITEMASK_XY | TGSI_WRITEMASK_W : 0;
339 read_mask |= TGSI_WRITEMASK_W;
H A Dtgsi_transform.h382 case TGSI_WRITEMASK_W:
432 case TGSI_WRITEMASK_W:
490 case TGSI_WRITEMASK_W:
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/tgsi/
H A Dtgsi_aa_point.c171 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
183 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
199 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
250 TGSI_WRITEMASK_W,
H A Dtgsi_util.c194 TGSI_WRITEMASK_XY | TGSI_WRITEMASK_W : 0;
278 read_mask |= TGSI_WRITEMASK_W;
H A Dtgsi_transform.h400 case TGSI_WRITEMASK_W:
450 case TGSI_WRITEMASK_W:
508 case TGSI_WRITEMASK_W:
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/vl/
H A Dvl_compositor_gfx.c110 ureg_RCP(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_W),
118 ureg_RCP(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_W),
161 ureg_MOV(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_W),
220 ureg_MOV(shader, ureg_writemask(texel, TGSI_WRITEMASK_W),
227 ureg_MOV(shader, ureg_writemask(temp[0], TGSI_WRITEMASK_W),
229 ureg_SLE(shader, ureg_writemask(temp[1], TGSI_WRITEMASK_W),
231 ureg_SGT(shader, ureg_writemask(temp[0], TGSI_WRITEMASK_W),
233 ureg_MAX(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W),
384 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(texel));
H A Dvl_idct.c236 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_abs(ureg_src(m[7][1])), ureg_imm1f(shader, 1 << 14));
240 ureg_CMP(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_negate(ureg_src(m[0][0])),
242 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_src(m[0][0]),
246 ureg_ADD(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(m[0][0]), ureg_src(m[7][1]));
H A Dvl_mc.c201 ureg_CMP(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W),
276 ureg_MOV(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_W), ureg_imm1f(shader, -1.0f));
297 ureg_CMP(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_W),
363 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
H A Dvl_zscan.c171 ureg_FLR(shader, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_src(tmp));
182 ureg_MUL(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_W), ureg_src(tmp),
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/vl/
H A Dvl_compositor_gfx.c110 ureg_RCP(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_W),
118 ureg_RCP(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_W),
161 ureg_MOV(shader, ureg_writemask(t_tc[i], TGSI_WRITEMASK_W),
220 ureg_MOV(shader, ureg_writemask(texel, TGSI_WRITEMASK_W),
227 ureg_MOV(shader, ureg_writemask(temp[0], TGSI_WRITEMASK_W),
229 ureg_SLE(shader, ureg_writemask(temp[1], TGSI_WRITEMASK_W),
231 ureg_SGT(shader, ureg_writemask(temp[0], TGSI_WRITEMASK_W),
233 ureg_MAX(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W),
384 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(texel));
H A Dvl_idct.c236 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_abs(ureg_src(m[7][1])), ureg_imm1f(shader, 1 << 14));
240 ureg_CMP(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_negate(ureg_src(m[0][0])),
242 ureg_MUL(shader, ureg_writemask(m[0][0], TGSI_WRITEMASK_W), ureg_src(m[0][0]),
246 ureg_ADD(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_src(m[0][0]), ureg_src(m[7][1]));
H A Dvl_mc.c201 ureg_CMP(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W),
276 ureg_MOV(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_W), ureg_imm1f(shader, -1.0f));
297 ureg_CMP(shader, ureg_writemask(o_flags, TGSI_WRITEMASK_W),
363 ureg_MOV(shader, ureg_writemask(fragment, TGSI_WRITEMASK_W), ureg_imm1f(shader, 1.0f));
H A Dvl_zscan.c171 ureg_FLR(shader, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_src(tmp));
182 ureg_MUL(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_W), ureg_src(tmp),
/xsrc/external/mit/MesaLib.old/dist/src/gallium/state_trackers/xa/
H A Dxa_tgsi.c116 ureg_MUL(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W),
289 ureg_writemask(tmp1, TGSI_WRITEMASK_W),
309 ureg_writemask(dst, TGSI_WRITEMASK_W),
/xsrc/external/mit/MesaLib/dist/src/gallium/frontends/xa/
H A Dxa_tgsi.c116 ureg_MUL(ureg, ureg_writemask(dst, TGSI_WRITEMASK_W),
289 ureg_writemask(tmp1, TGSI_WRITEMASK_W),
309 ureg_writemask(dst, TGSI_WRITEMASK_W),
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/i915/
H A Di915_fpc_optimize.c148 mask |= TGSI_WRITEMASK_W;
168 if ( write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W)
211 if ( write_mask & TGSI_WRITEMASK_W )
375 mask |= TGSI_WRITEMASK_W;
463 if (dst_reg2->Register.WriteMask & TGSI_WRITEMASK_W)
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/i915/
H A Di915_fpc_optimize.c157 mask |= TGSI_WRITEMASK_W;
180 if (write_mask & TGSI_WRITEMASK_W && r->Register.SwizzleW != TGSI_SWIZZLE_W)
225 if (write_mask & TGSI_WRITEMASK_W)
396 mask |= TGSI_WRITEMASK_W;
490 if (dst_reg2->Register.WriteMask & TGSI_WRITEMASK_W)
/xsrc/external/mit/MesaLib.old/dist/src/gallium/auxiliary/draw/
H A Ddraw_pipe_aapoint.c275 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
292 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
319 TGSI_WRITEMASK_W,
H A Ddraw_pipe_aaline.c219 TGSI_WRITEMASK_W,
234 TGSI_WRITEMASK_W,
/xsrc/external/mit/MesaLib/dist/src/gallium/auxiliary/draw/
H A Ddraw_pipe_aapoint.c277 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
294 TGSI_FILE_TEMPORARY, tmp0, TGSI_WRITEMASK_W,
321 TGSI_WRITEMASK_W,
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/llvmpipe/
H A Dlp_setup_point.c200 if (usage_mask & TGSI_WRITEMASK_W) {
228 fragcoord_usage_mask |= TGSI_WRITEMASK_W;
H A Dlp_setup_line.c158 if (usage_mask & TGSI_WRITEMASK_W) {
204 fragcoord_usage_mask |= TGSI_WRITEMASK_W;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_shaderlib_tgsi.c730 ureg_MOV(ureg, ureg_writemask(coord, TGSI_WRITEMASK_W), ureg_imm1u(ureg, i));
739 ureg_MOV(ureg, ureg_writemask(coord, TGSI_WRITEMASK_W), ureg_imm1u(ureg, i));
/xsrc/external/mit/MesaLib.old/dist/src/mesa/state_tracker/
H A Dst_tgsi_lower_yuv.c299 if (dst->Register.WriteMask & TGSI_WRITEMASK_W) {
301 reg_dst(&inst.Dst[0], dst, TGSI_WRITEMASK_W);

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