Searched refs:TM0S1_TILED_SURFACE (Results 1 - 15 of 15) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/mesa/drivers/dri/i915/
H A Di830_texstate.c168 state[I830_TEXREG_TM0S1] |= TM0S1_TILED_SURFACE;
H A Di830_reg.h577 #define TM0S1_TILED_SURFACE (1 << 1) macro
/xsrc/external/mit/MesaLib/dist/src/mesa/drivers/dri/i915/
H A Di830_texstate.c168 state[I830_TEXREG_TM0S1] |= TM0S1_TILED_SURFACE;
H A Di830_reg.h577 #define TM0S1_TILED_SURFACE (1 << 1) macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen2_render.h665 #define TM0S1_TILED_SURFACE (1 << 1) macro
H A Dgen2_render.c225 bits |= TM0S1_TILED_SURFACE;
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di830_reg.h742 #define TM0S1_TILED_SURFACE (1 << 1) macro
H A Di830_render.c298 tiling_bits = TM0S1_TILED_SURFACE;
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di830_reg.h736 #define TM0S1_TILED_SURFACE (1 << 1) macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen2_render.h665 #define TM0S1_TILED_SURFACE (1 << 1) macro
H A Dgen2_render.c222 bits |= TM0S1_TILED_SURFACE;
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di830_reg.h736 #define TM0S1_TILED_SURFACE (1 << 1) macro
H A Di830_render.c298 tiling_bits = TM0S1_TILED_SURFACE;
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di830_reg.h736 #define TM0S1_TILED_SURFACE (1 << 1) macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di830_reg.h676 #define TM0S1_TILED_SURFACE (1 << 1) macro

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