Searched refs:TYPE_F64 (Results 1 - 25 of 36) sorted by relevance

12

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target_gm107.cpp64 if (ty == TYPE_F64)
115 if (insn->dType == TYPE_F64 || insn->sType == TYPE_F64)
241 if (insn->dType != TYPE_F64)
H A Dnv50_ir_inlines.h68 case TYPE_F64:
92 case TYPE_F64:
112 case 8: return flt ? TYPE_F64 : (sgn ? TYPE_S64 : TYPE_U64);
124 return (ty >= TYPE_F16 && ty <= TYPE_F64);
H A Dnv50_ir_emit_nv50.cpp589 case TYPE_F64: // fall through
943 if (i->dType == TYPE_F64) {
1297 case TYPE_F64:
1366 case TYPE_F64:
1368 case TYPE_F64: code[1] = 0xc4404000; break;
1381 case TYPE_F64: code[1] = 0x8c404000; break;
1390 case TYPE_F64: code[1] = 0x84404000; break;
1399 case TYPE_F64: code[1] = 0xc0404000; break;
1414 case TYPE_F64: code[1] = 0x88404000; break;
1430 case TYPE_F64
[all...]
H A Dnv50_ir_target_nvc0.cpp396 case TYPE_F64:
567 if (i->dType == TYPE_F64 || i->sType == TYPE_F64)
659 if (i->dType == TYPE_F64) {
H A Dnv50_ir_emit_gk110.cpp343 if (i->sType == TYPE_F64) {
1022 case TYPE_F64:
1118 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1145 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
2122 case TYPE_F64:
2545 if (insn->dType == TYPE_F64)
2553 if (insn->dType == TYPE_F64)
2562 if (insn->dType == TYPE_F64)
H A Dnv50_ir_target_nv50.cpp423 if (ty == TYPE_F64 && chipset < 0xa0)
559 if (i->dType == TYPE_F64) {
H A Dnv50_ir.cpp351 reg.type = TYPE_F64;
401 case TYPE_F64:
417 case TYPE_F64: return reg.data.u64 & (1ULL << 63);
455 case TYPE_F64:
H A Dnv50_ir_peephole.cpp513 case TYPE_F64:
574 case TYPE_F64: res.data.f64 = a->data.f64 * b->data.f64; break;
596 case TYPE_F64: res.data.f64 = a->data.f64 / b->data.f64; break;
606 case TYPE_F64: res.data.f64 = a->data.f64 + b->data.f64; break;
616 case TYPE_F64: res.data.f64 = a->data.f64 - b->data.f64; break;
626 case TYPE_F64: res.data.f64 = pow(a->data.f64, b->data.f64); break;
634 case TYPE_F64: res.data.f64 = MAX2(a->data.f64, b->data.f64); break;
644 case TYPE_F64: res.data.f64 = MIN2(a->data.f64, b->data.f64); break;
714 case TYPE_F64:
797 case TYPE_F64
[all...]
H A Dnv50_ir_build_util.cpp410 return mkOp1v(OP_MOV, TYPE_F64, dst ? dst : getScratch(8), mkImm(d));
570 case TYPE_F64:
H A Dnv50_ir_emit_gm107.cpp346 } else if (insn->sType == TYPE_F64) {
3443 if (insn->dType == TYPE_F64)
3453 if (insn->dType == TYPE_F64)
3464 if (insn->dType == TYPE_F64)
3481 if (insn->dType == TYPE_F64)
3525 if (insn->sType == TYPE_F64)
3533 if (insn->sType == TYPE_F64)
H A Dnv50_ir_from_tgsi.cpp662 return nv50_ir::TYPE_F64;
731 return nv50_ir::TYPE_F64;
3995 mkOp1(OP_FLOOR, TYPE_F64, dst, src0);
3996 mkOp2(OP_SUB, TYPE_F64, dst, src0, dst);
4118 mkCvt(OP_CVT, TYPE_F64, dst, TYPE_F64, src0)
4136 mkCmp(OP_SET, CC_GT, TYPE_F32, val0, TYPE_F64, src0, zero);
4137 mkCmp(OP_SET, CC_LT, TYPE_F32, val1, TYPE_F64, src0, zero);
4139 mkCvt(OP_CVT, TYPE_F64, dst, TYPE_F32, dstF32);
H A Dnv50_ir_print.cpp489 case TYPE_F64: PRINT("%f", reg.data.f64); break;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_target_gm107.cpp64 if (ty == TYPE_F64)
115 if (insn->dType == TYPE_F64 || insn->sType == TYPE_F64)
241 if (insn->dType != TYPE_F64)
H A Dnv50_ir_inlines.h68 case TYPE_F64:
92 case TYPE_F64:
112 case 8: return flt ? TYPE_F64 : (sgn ? TYPE_S64 : TYPE_U64);
124 return (ty >= TYPE_F16 && ty <= TYPE_F64);
H A Dnv50_ir_emit_nv50.cpp587 case TYPE_F64: // fall through
950 if (i->dType == TYPE_F64) {
1305 case TYPE_F64:
1374 case TYPE_F64:
1376 case TYPE_F64: code[1] = 0xc4404000; break;
1389 case TYPE_F64: code[1] = 0x8c404000; break;
1398 case TYPE_F64: code[1] = 0x84404000; break;
1407 case TYPE_F64: code[1] = 0xc0404000; break;
1425 case TYPE_F64: code[1] = 0x88404000; break;
1441 case TYPE_F64
[all...]
H A Dnv50_ir_target_nvc0.cpp406 case TYPE_F64:
577 if (i->dType == TYPE_F64 || i->sType == TYPE_F64)
669 if (i->dType == TYPE_F64) {
H A Dnv50_ir_emit_gk110.cpp341 if (i->sType == TYPE_F64) {
1020 case TYPE_F64:
1116 case TYPE_F64: op2 = 0x1c0; op1 = 0xb40; break;
1143 case TYPE_F64: op2 = 0x080; op1 = 0x900; break;
2129 case TYPE_F64:
2552 if (insn->dType == TYPE_F64)
2560 if (insn->dType == TYPE_F64)
2569 if (insn->dType == TYPE_F64)
H A Dnv50_ir_target_nv50.cpp434 if (ty == TYPE_F64 && chipset < 0xa0)
570 if (i->dType == TYPE_F64) {
H A Dnv50_ir.cpp352 reg.type = TYPE_F64;
402 case TYPE_F64:
418 case TYPE_F64: return reg.data.u64 & (1ULL << 63);
456 case TYPE_F64:
H A Dnv50_ir_peephole.cpp516 case TYPE_F64:
590 case TYPE_F64: res.data.f64 = a->data.f64 * b->data.f64; break;
612 case TYPE_F64: res.data.f64 = a->data.f64 / b->data.f64; break;
622 case TYPE_F64: res.data.f64 = a->data.f64 + b->data.f64; break;
632 case TYPE_F64: res.data.f64 = a->data.f64 - b->data.f64; break;
642 case TYPE_F64: res.data.f64 = pow(a->data.f64, b->data.f64); break;
650 case TYPE_F64: res.data.f64 = MAX2(a->data.f64, b->data.f64); break;
660 case TYPE_F64: res.data.f64 = MIN2(a->data.f64, b->data.f64); break;
730 case TYPE_F64:
830 case TYPE_F64
[all...]
H A Dnv50_ir_emit_gv100.h310 if (insn->sType == TYPE_F64) {
H A Dnv50_ir_build_util.cpp424 return mkOp1v(OP_MOV, TYPE_F64, dst ? dst : getScratch(8), mkImm(d));
600 case TYPE_F64:
H A Dnv50_ir_target_gv100.cpp358 if (i->sType == TYPE_F64)
504 if (i->sType == TYPE_F64) {
H A Dnv50_ir_emit_gm107.cpp350 } else if (insn->sType == TYPE_F64) {
3508 if (insn->dType == TYPE_F64)
3518 if (insn->dType == TYPE_F64)
3529 if (insn->dType == TYPE_F64)
3546 if (insn->dType == TYPE_F64)
3593 if (insn->sType == TYPE_F64)
3601 if (insn->sType == TYPE_F64)
H A Dnv50_ir_from_tgsi.cpp602 return nv50_ir::TYPE_F64;
671 return nv50_ir::TYPE_F64;
4027 mkOp1(OP_FLOOR, TYPE_F64, dst, src0);
4028 mkOp2(OP_SUB, TYPE_F64, dst, src0, dst);
4150 mkCvt(OP_CVT, TYPE_F64, dst, TYPE_F64, src0)
4168 mkCmp(OP_SET, CC_GT, TYPE_F32, val0, TYPE_F64, src0, zero);
4169 mkCmp(OP_SET, CC_LT, TYPE_F32, val1, TYPE_F64, src0, zero);
4171 mkCvt(OP_CVT, TYPE_F64, dst, TYPE_F32, dstF32);

Completed in 44 milliseconds

12