Searched refs:TYPE_U64 (Results 1 - 25 of 32) sorted by relevance

12

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_inlines.h69 case TYPE_U64:
93 case TYPE_U64:
112 case 8: return flt ? TYPE_F64 : (sgn ? TYPE_S64 : TYPE_U64);
139 case TYPE_U64:
151 case TYPE_U64: return TYPE_S64;
H A Dnv50_ir_lowering_helper.cpp62 if (!(dTy == TYPE_U64 || dTy == TYPE_S64))
94 (dTy == TYPE_U32 && sTy == TYPE_U64)) {
104 } else if (dTy == TYPE_U64 && sTy == TYPE_U32) {
116 if (!(dTy == TYPE_U64 || dTy == TYPE_S64))
H A Dnv50_ir_lowering_nvc0.cpp108 bld.mkOp2(OP_MERGE, TYPE_U64, i->getDef(0), def[0], def[1]);
150 bld.mkOp2(OP_MERGE, TYPE_U64, def, dst[0], dst[1]);
263 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
292 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
1653 base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
1723 bld.mkOp2(OP_MERGE, TYPE_U64, dreg, cas->getSrc(1), cas->getSrc(2));
1751 mkLoadv(TYPE_U64, bld.mkSymbol(FILE_MEMORY_CONST, b, TYPE_U64, off), ptr);
1764 mkLoadv(TYPE_U32, bld.mkSymbol(FILE_MEMORY_CONST, b, TYPE_U64, off + 8), ptr);
2129 bld.mkOp2(OP_MERGE, TYPE_U64, add
[all...]
H A Dnv50_ir_from_tgsi.cpp677 return nv50_ir::TYPE_U64;
739 return nv50_ir::TYPE_U64;
3888 mkOp2(OP_MERGE, TYPE_U64, dreg, src0, src1);
3933 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
3947 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
3959 mkOp2(OP_MERGE, TYPE_U64, src0, srcComp[0], srcComp[1]);
3982 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
3994 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
4019 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
4022 mkOp2(OP_MERGE, TYPE_U64, src
[all...]
H A Dnv50_ir_build_util.cpp378 imm->reg.type = TYPE_U64;
422 return mkOp1v(OP_MOV, TYPE_U64, dst ? dst : getScratch(8), mkImm(u));
568 case TYPE_U64: hTy = TYPE_U32; break;
H A Dnv50_ir.cpp397 case TYPE_U64:
426 if (reg.type == TYPE_U64 || reg.type == TYPE_S64)
449 case TYPE_U64:
H A Dnv50_ir_emit_gm107.cpp2206 case TYPE_U64:
2584 case TYPE_U64: dType = 1; break;
2594 case TYPE_U64: dType = 2; break;
2624 case TYPE_U64: dType = 1; break;
2635 case TYPE_U64: dType = 2; break;
2663 case TYPE_U64: dType = 2; break;
3273 case TYPE_U64: type = 5; break;
3305 case TYPE_U64: type = 2; break;
H A Dnv50_ir_emit_nv50.cpp591 case TYPE_U64: enc = 0x4; break;
1370 case TYPE_U64: code[1] = 0x44404000; break;
1388 case TYPE_U64:
1401 case TYPE_U64: code[1] = 0x40404000; break;
H A Dnv50_ir_print.cpp496 case TYPE_U64:
H A Dnv50_ir_lowering_nv50.cpp53 case TYPE_S64: fTy = TYPE_U64; break;
60 case TYPE_U64: hTy = TYPE_U32; break;
H A Dnv50_ir.h294 TYPE_U64, // 64 bit operations are only lowered after register allocation enumerator in enum:nv50_ir::DataType
H A Dnv50_ir_emit_gk110.cpp2123 case TYPE_U64:
2405 case TYPE_U64: code[1] |= 0x00200000; break;
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/
H A Dnv50_ir_inlines.h69 case TYPE_U64:
93 case TYPE_U64:
112 case 8: return flt ? TYPE_F64 : (sgn ? TYPE_S64 : TYPE_U64);
139 case TYPE_U64:
151 case TYPE_U64: return TYPE_S64;
H A Dnv50_ir_lowering_helper.cpp62 if (!(dTy == TYPE_U64 || dTy == TYPE_S64))
94 (dTy == TYPE_U32 && sTy == TYPE_U64)) {
104 } else if (dTy == TYPE_U64 && sTy == TYPE_U32) {
116 if (!(dTy == TYPE_U64 || dTy == TYPE_S64))
H A Dnv50_ir_lowering_gv100.cpp80 src2 = bld.mkOp2(OP_MERGE, TYPE_U64, bld.getSSA(8), src2s[0], src2s[1])->getDef(0);
85 bld.mkOp3(OP_MAD, isSignedType(i->sType) ? TYPE_S64 : TYPE_U64, def,
341 bld.mkOp2(OP_MERGE, TYPE_U64, i->getDef(0), dest[0], dest[1]);
H A Dnv50_ir_emit_gv100.cpp826 case TYPE_U64: emitField(73, 2, 1); break;
879 case TYPE_U64 : dType = 2; break;
894 case TYPE_U64: dType = 2; break;
922 case TYPE_U64: dType = 2; break;
942 case TYPE_U64: dType = 2; break;
1133 case TYPE_U64: dType = 2; break;
1453 case TYPE_U64: type = 2; break;
1498 case TYPE_U64: type = 5; break;
H A Dnv50_ir_from_tgsi.cpp617 return nv50_ir::TYPE_U64;
679 return nv50_ir::TYPE_U64;
3920 mkOp2(OP_MERGE, TYPE_U64, dreg, src0, src1);
3965 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
3979 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
3991 mkOp2(OP_MERGE, TYPE_U64, src0, srcComp[0], srcComp[1]);
4014 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
4026 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
4051 mkOp2(OP_MERGE, TYPE_U64, src0, tmp[0], tmp[1]);
4054 mkOp2(OP_MERGE, TYPE_U64, src
[all...]
H A Dnv50_ir_build_util.cpp392 imm->reg.type = TYPE_U64;
442 return mkOp1v(OP_MOV, TYPE_U64, dst ? dst : getScratch(8), mkImm(u));
598 case TYPE_U64: hTy = TYPE_U32; break;
H A Dnv50_ir_lowering_nvc0.cpp108 bld.mkOp2(OP_MERGE, TYPE_U64, i->getDef(0), def[0], def[1]);
150 bld.mkOp2(OP_MERGE, TYPE_U64, def, dst[0], dst[1]);
263 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
292 bld.mkOp2(OP_MERGE, TYPE_U64, dst64, dst[0], dst[1]);
1669 base = bld.mkOp2v(OP_ADD, TYPE_U64, base, base, ptr);
1769 mkLoadv(TYPE_U64, bld.mkSymbol(FILE_MEMORY_CONST, b, TYPE_U64, off), ptr);
1782 mkLoadv(TYPE_U32, bld.mkSymbol(FILE_MEMORY_CONST, b, TYPE_U64, off + 8), ptr);
2150 bld.mkOp2(OP_MERGE, TYPE_U64, addr, bf, eau);
2153 bld.mkOp2(OP_ADD, TYPE_U64, add
[all...]
H A Dnv50_ir.cpp398 case TYPE_U64:
427 if (reg.type == TYPE_U64 || reg.type == TYPE_S64)
450 case TYPE_U64:
H A Dnv50_ir_emit_gm107.cpp2244 case TYPE_U64:
2649 case TYPE_U64: dType = 1; break;
2659 case TYPE_U64: dType = 2; break;
2689 case TYPE_U64: dType = 1; break;
2700 case TYPE_U64: dType = 2; break;
2728 case TYPE_U64: dType = 2; break;
3338 case TYPE_U64: type = 5; break;
3370 case TYPE_U64: type = 2; break;
H A Dnv50_ir_emit_nv50.cpp589 case TYPE_U64: enc = 0x4; break;
1378 case TYPE_U64: code[1] = 0x44404000; break;
1396 case TYPE_U64:
1409 case TYPE_U64: code[1] = 0x40404000; break;
H A Dnv50_ir.h319 TYPE_U64, // 64 bit operations are only lowered after register allocation enumerator in enum:nv50_ir::DataType
H A Dnv50_ir_print.cpp529 case TYPE_U64:
H A Dnv50_ir_emit_gk110.cpp2130 case TYPE_U64:
2412 case TYPE_U64: code[1] |= 0x00200000; break;

Completed in 60 milliseconds

12