Searched refs:UCHAR (Results 1 - 25 of 36) sorted by relevance

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/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dvb_struct.h34 UCHAR timer[2];
50 UCHAR Reg[8];
54 UCHAR Reg[7];
67 UCHAR FlickerMode;
69 UCHAR RY1COE;
70 UCHAR RY2COE;
71 UCHAR RY3COE;
72 UCHAR RY4COE;
91 UCHAR CR[15];
99 UCHAR St_ModeI
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H A Dvb_i2c.h98 u8 Data; /* Data to write, or returned UCHAR */
117 UCHAR LoUCHAR;
118 UCHAR HiUCHAR;
122 UCHAR WeekOfManufacture;
123 UCHAR YearOfManufacture;
124 UCHAR bEDIDVersion; /* should be 1 */
125 UCHAR bEDIDRevision; /* should be 0~3 */
126 UCHAR bVideoInput;
127 UCHAR bMaxHzImageSize; /* cm */
128 UCHAR bMaxVtImageSiz
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H A Dvgatypes.h91 #ifndef UCHAR
92 typedef unsigned char UCHAR; typedef in typeref:typename:unsigned char
104 typedef UCHAR *PUCHAR;
124 typedef UCHAR BOOLEAN;
128 typedef UCHAR bool; typedef in typeref:typename:bool
206 UCHAR jIdx;
207 UCHAR jVal;
240 UCHAR jChipType; /* Used to Identify Graphics Chip */
244 UCHAR jChipRevision; /* Used to Identify Graphics Chip Revision */
246 UCHAR ujVBChipI
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H A Dvb_init.h35 extern void ReadVBIOSTablData(UCHAR ChipType, PVB_DEVICE_INFO pVBInfo);
H A Dvb_i2c.c63 BOOLEAN WriteUCHARI2C(PXGI_HW_DEVICE_INFO pHWDE, UCHAR cData);
65 UCHAR ReverseUCHAR(UCHAR data);
67 VOID vWriteClockLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
68 VOID vWriteDataLineDVI(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
74 VOID vWriteClockLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
75 VOID vWriteDataLineCRT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
80 VOID vWriteClockLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
81 VOID vWriteDataLineFCNT(PXGI_HW_DEVICE_INFO pHWDE, UCHAR data);
86 VOID vWriteClockLine(PXGI_HW_DEVICE_INFO pHWDE, UCHAR dat
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H A Dvb_ext.h44 UCHAR al, ah, hi_al, hi_ah, bl, bh, hi_bl, hi_bh, cl, ch, hi_cl, hi_ch, dl, dh, hi_dl, hi_dh;
61 extern void ReadVBIOSTablData( UCHAR ChipType , PVB_DEVICE_INFO pVBInfo);
H A Dvb_init.c62 static UCHAR XGINew_ChannelAB;
63 static UCHAR XGINew_DataBusWidth;
133 static UCHAR XGINew_Get340DRAMType(PXGI_HW_DEVICE_INFO, PVB_DEVICE_INFO);
135 static int XGINew_SetDDRChannel(int index, UCHAR ChannelNo,
136 UCHAR XGINew_ChannelAB, const USHORT DRAMTYPE_TABLE[][5],
144 static int XGINew_SetRank(int index, UCHAR RankNo, UCHAR XGINew_ChannelAB,
168 static UCHAR GetXG21FPBits(PVB_DEVICE_INFO pVBInfo);
170 static UCHAR GetXG27FPBits(PVB_DEVICE_INFO pVBInfo);
205 static UCHAR XGINew_CheckFrequenc
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H A Dvb_setmode.c191 void InitTo330Pointer(UCHAR, PVB_DEVICE_INFO pVBInfo);
214 void XGI_GetTVPtrIndex2(USHORT * tempbx, UCHAR * tempcl, UCHAR * tempch,
225 void XGINew_LCD_Wait_Time(UCHAR DelayTime, PVB_DEVICE_INFO pVBInfo);
230 static void XGI_GetLCDVCLKPtr(UCHAR *di, PVB_DEVICE_INFO pVBInfo);
233 static void XGI_GetVCLKLen(unsigned vclkindex, UCHAR *di,
242 UCHAR XGI_XG21GetPSCValue(PVB_DEVICE_INFO pVBInfo);
243 UCHAR XGI_XG27GetPSCValue(PVB_DEVICE_INFO pVBInfo);
250 UCHAR XGI_SetDefaultVCLK( PVB_DEVICE_INFO pVBInfo );
306 InitTo330Pointer(UCHAR ChipTyp
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H A Dvb_table.h88 UCHAR XGI27_cr41[24][8]=
116 UCHAR XGI340_CR6B[8][4]={
127 static const UCHAR XGI45_CR6E[CR6E_SIZE] = {
143 static const UCHAR XGI45_CR6F[CR6F_SIZE] = {
193 static const UCHAR XGI340_AGPReg[AGP_REG_SIZE] = {
202 static const UCHAR XGI340_SR16[4] = { 0x03, 0x83, 0x03, 0x83 };
204 static const UCHAR XGI330_SR25[2] = { 0x00, 0x00 };
205 static const UCHAR XGI330_SR31 = 0x40;
206 static const UCHAR XGI330_SR32 = 0x11;
207 static const UCHAR XG40_CRC
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H A Dvb_ext.c451 void XGIPowerSaving(PVB_DEVICE_INFO pVBInfo, UCHAR PowerSavingStatus)
497 extern UCHAR g_PowerSavingStatus;
509 UCHAR temp ;
544 XGINew_SetReg1( pVBInfo->Part4Port , 0x31 , ( UCHAR )( XGINew_GetReg1( pVBInfo->Part4Port , 0x31 ) & 0xFE ) ) ;
546 XGINew_SetReg1( pVBInfo->Part4Port , 0x31 , ( UCHAR )( XGINew_GetReg1( pVBInfo->Part4Port , 0x31 ) | 0x01 ) ) ;
549 temp = ( UCHAR )XGI_GetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1f ) ;
558 XGINew_SetReg1( pVBInfo->P3c4 , 0x1f , ( UCHAR )( temp | 0x00 ) ) ;
646 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1f , ( UCHAR )( temp | 0x40 ) ) ;
670 XGI_SetReg((XGIIOADDRESS) pVBInfo->P3c4 , 0x1f , ( UCHAR )( temp | 0x80 ) ) ;
681 XGINew_SetReg1( pVBInfo->P3c4 , 0x1f , ( UCHAR )( tem
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H A Dvb_setmode.h30 extern void InitTo330Pointer(UCHAR,PVB_DEVICE_INFO);
H A Dxgi.h795 UCHAR ScratchSet[16];
997 extern UCHAR XGI_GetModePtr(const XGI_StStruct *SModeIDTable,
1004 extern UCHAR XGI_GetReg(XGIIOADDRESS port, USHORT index);
1005 extern UCHAR XGI_GetRegByte(XGIIOADDRESS port);
/xsrc/external/mit/xf86-video-ati/dist/src/AtomBios/includes/
H A Datombios.h49 #ifndef UCHAR
50 typedef unsigned char UCHAR; typedef in typeref:typename:unsigned char
190 UCHAR ucTableFormatRevision; /*Change it when the Parser is not backward compatible */
191 UCHAR ucTableContentRevision; /*Change it only when the table needs to change but the firmware */
198 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
213 UCHAR ucExtendedFunctionCode;
214 UCHAR ucReserved;
364 UCHAR ucAction; //0:reserved //1:Memory //2:Engine
365 UCHAR ucReserved; //may expand to return larger Fbdiv later
366 UCHAR ucFbDi
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H A DCD_binding.h45 #define RELATIVE_TO_TABLE( x ) (x + (UCHAR *)(pParserTempData->pWorkingTableData->pTableHead))
H A DCD_Common_Types.h126 #ifndef UCHAR
127 typedef UINT8 UCHAR; typedef in typeref:typename:UINT8
/xsrc/external/mit/xf86-video-ast/dist/src/
H A Dast_mode.h91 UCHAR MISC;
92 UCHAR SEQ[4];
93 UCHAR CRTC[25];
94 UCHAR AR[20];
95 UCHAR GR[9];
119 UCHAR Param1;
120 UCHAR Param2;
121 UCHAR Param3;
125 UCHAR DACR;
126 UCHAR DAC
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H A Dast.h112 typedef CARD8 UCHAR; typedef in typeref:typename:CARD8
119 UCHAR ExtCRTC[0x50];
121 UCHAR MISC;
122 UCHAR SEQ[4];
123 UCHAR CRTC[25];
124 UCHAR AR[20];
125 UCHAR GR[9];
126 UCHAR DAC[256][3];
130 UCHAR REGA4;
149 UCHAR *pjCMDQVirtualAdd
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H A Dast_cursor.c62 static void ASTLoadCursorImage(ScrnInfoPtr pScrn, UCHAR *src);
153 UCHAR jReg;
178 UCHAR *pjSignature;
181 pjSignature = (UCHAR *) pAST->HWCInfo.pjHWCVirtualAddr + (HWC_SIZE+HWC_SIGNATURE_SIZE)*pAST->HWCInfo.HWC_NUM_Next + HWC_SIZE;
201 SetIndexReg(CRTC_PORT, 0xC2, (UCHAR) (x_offset));
202 SetIndexReg(CRTC_PORT, 0xC3, (UCHAR) (y_offset));
203 SetIndexReg(CRTC_PORT, 0xC4, (UCHAR) (x & 0xFF));
204 SetIndexReg(CRTC_PORT, 0xC5, (UCHAR) ((x >> 8) & 0x0F));
205 SetIndexReg(CRTC_PORT, 0xC6, (UCHAR) (y & 0xFF));
206 SetIndexReg(CRTC_PORT, 0xC7, (UCHAR) ((
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H A Dast_vgatool.h70 UCHAR __Temp; \
78 UCHAR __junk; \
79 SetReg(DAC_INDEX_READ,(UCHAR)(index)); \
92 UCHAR __junk; \
93 SetReg(DAC_INDEX_WRITE,(UCHAR)(index)); \
95 SetReg(DAC_DATA,(UCHAR)(red)); \
97 SetReg(DAC_DATA,(UCHAR)(green)); \
99 SetReg(DAC_DATA,(UCHAR)(blue)); \
H A Dast_vgatool.c58 __inline ULONG MIndwm(UCHAR *mmiobase, ULONG r)
73 __inline void MOutdwm(UCHAR *mmiobase, ULONG r, ULONG v)
96 UCHAR *mmiobase;
105 UCHAR SendACK;
115 UCHAR SendACK;
125 UCHAR WaitACK;
143 UCHAR WaitACK;
172 static Bool write_cmd(ScrnInfoPtr pScrn, UCHAR data)
175 UCHAR retry = 0;
198 static Bool write_data(ScrnInfoPtr pScrn, UCHAR dat
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H A Dast_mode.c691 SetIndexReg(CRTC_PORT, 0x8C, (UCHAR) ((ulColorIndex & 0x0F) << 4));
692 SetIndexReg(CRTC_PORT, 0x8D, (UCHAR) (ulRefreshRateIndex & 0xFF));
693 SetIndexReg(CRTC_PORT, 0x8E, (UCHAR) (ulModeID & 0xFF));
700 SetIndexReg(CRTC_PORT, 0x92, (UCHAR) (pScrn->bitsPerPixel) );
701 SetIndexReg(CRTC_PORT, 0x93, (UCHAR) (mode->Clock / 1000) );
702 SetIndexReg(CRTC_PORT, 0x94, (UCHAR) (mode->CrtcHDisplay) );
703 SetIndexReg(CRTC_PORT, 0x95, (UCHAR) (mode->CrtcHDisplay >> 8) ); /* color depth */
704 SetIndexReg(CRTC_PORT, 0x96, (UCHAR) (mode->CrtcVDisplay) );
705 SetIndexReg(CRTC_PORT, 0x97, (UCHAR) (mode->CrtcVDisplay >> 8) ); /* color depth */
718 UCHAR jRe
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H A Dast_2dtool.c310 UCHAR jReg;
360 UCHAR *pASTjRequestCMDQ(
363 UCHAR *pjBuffer;
H A Dast_driver.c1162 UCHAR jReg;
1379 UCHAR jReg;
1386 GetIndexReg(SEQ_PORT, (UCHAR) (i), astReg->SEQ[i]);
1390 GetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->CRTC[i]);
1394 GetIndexReg(GR_PORT, (UCHAR) (i), astReg->GR[i]);
1399 GetIndexReg(AR_PORT_WRITE, (UCHAR) (i), astReg->AR[i]);
1420 GetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1422 GetIndexReg(CRTC_PORT, (UCHAR) (i), astReg->ExtCRTC[icount++]);
1423 GetIndexReg(CRTC_PORT, (UCHAR) (0xBB), astReg->ExtCRTC[icount]);
1462 UCHAR jRe
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/xsrc/external/mit/xf86-video-ati/dist/src/
H A Dradeon_atombios.h158 # ifndef UCHAR
159 typedef unsigned char UCHAR; typedef in typeref:typename:unsigned char
160 # define UCHAR UCHAR macro
/xsrc/external/mit/xf86-video-qxl/dist/src/spiceccid/
H A Dspiceccid.c473 RESPONSECODE IFDHSetProtocolParameters(DWORD Lun, DWORD Protocol, UCHAR Flags,
474 UCHAR PTS1, UCHAR PTS2, UCHAR PTS3)

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