Searched refs:UF0_CS_REALLOC (Results 1 - 25 of 27) sorted by relevance

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/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_reg.h303 #define UF0_CS_REALLOC (1 << 13) macro
H A Di965_video.c1002 UF0_CS_REALLOC |
H A Di965_render.c1698 UF0_CS_REALLOC |
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Di965_reg.h276 #define UF0_CS_REALLOC (1 << 13) macro
H A Di965_xvmc.c293 UF0_CS_REALLOC |
H A Dxvmc_vld.c895 UF0_CS_REALLOC |
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_reg.h303 #define UF0_CS_REALLOC (1 << 13) macro
H A Di965_video.c1003 UF0_CS_REALLOC |
H A Di965_render.c1698 UF0_CS_REALLOC |
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Di965_reg.h276 #define UF0_CS_REALLOC (1 << 13) macro
H A Di965_xvmc.c293 UF0_CS_REALLOC |
H A Dxvmc_vld.c895 UF0_CS_REALLOC |
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen6_render.h424 #define UF0_CS_REALLOC (1 << 13) macro
H A Dgen4_render.h85 #define UF0_CS_REALLOC (1 << 13) macro
H A Dgen5_render.h168 #define UF0_CS_REALLOC (1 << 13) macro
H A Dgen4_render.c835 UF0_CS_REALLOC |
H A Dgen5_render.c751 UF0_CS_REALLOC |
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen6_render.h424 #define UF0_CS_REALLOC (1 << 13) macro
H A Dgen4_render.h85 #define UF0_CS_REALLOC (1 << 13) macro
H A Dgen5_render.h168 #define UF0_CS_REALLOC (1 << 13) macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di965_video.c898 UF0_CS_REALLOC |
H A Di810_reg.h2626 #define UF0_CS_REALLOC (1 << 13) macro
H A Di965_render.c1272 UF0_CS_REALLOC |
/xsrc/external/mit/xf86-video-intel-old/dist/src/xvmc/
H A Di965_xvmc.c284 UF0_CS_REALLOC |
H A Dxvmc_vld.c816 UF0_CS_REALLOC |

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