Searched refs:URB_CS_ENTRIES (Results 1 - 10 of 10) sorted by relevance

/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Di965_video.c344 #define URB_CS_ENTRIES 0 macro
773 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
913 (URB_CS_ENTRIES << 0));
H A Di965_render.c262 #define URB_CS_ENTRIES 0 macro
1145 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
1287 (URB_CS_ENTRIES << 0));
/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di965_video.c380 #define URB_CS_ENTRIES 0 macro
891 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
1013 OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) | (URB_CS_ENTRIES << 0));
H A Di965_render.c281 #define URB_CS_ENTRIES 0 macro
1686 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
1713 (URB_CS_ENTRIES << 0));
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di965_video.c381 #define URB_CS_ENTRIES 0 macro
892 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
1014 OUT_BATCH(((URB_CS_ENTRY_SIZE - 1) << 4) | (URB_CS_ENTRIES << 0));
H A Di965_render.c281 #define URB_CS_ENTRIES 0 macro
1686 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
1713 (URB_CS_ENTRIES << 0));
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen4_render.c76 #define URB_CS_ENTRIES 0 macro
828 urb_cs_end = urb_sf_end + URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
849 OUT_BATCH((URB_CS_ENTRY_SIZE - 1) << 4 | URB_CS_ENTRIES << 0);
H A Dgen5_render.c67 #define URB_CS_ENTRIES 0 macro
748 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
765 OUT_BATCH((URB_CS_ENTRY_SIZE - 1) << 4 | URB_CS_ENTRIES << 0);
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen4_render.c76 #define URB_CS_ENTRIES 0 macro
791 urb_cs_end = urb_sf_end + URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
812 OUT_BATCH((URB_CS_ENTRY_SIZE - 1) << 4 | URB_CS_ENTRIES << 0);
H A Dgen5_render.c67 #define URB_CS_ENTRIES 0 macro
711 urb_cs_size = URB_CS_ENTRIES * URB_CS_ENTRY_SIZE;
728 OUT_BATCH((URB_CS_ENTRY_SIZE - 1) << 4 | URB_CS_ENTRIES << 0);

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