Searched refs:V3D_QPU_A_NOP (Results 1 - 20 of 20) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dvir_to_qpu.c55 .op = V3D_QPU_A_NOP,
74 struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
139 qinst->qpu.alu.add.op != V3D_QPU_A_NOP ||
275 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP);
294 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP);
299 } else if (qinst->qpu.alu.add.op != V3D_QPU_A_NOP) {
H A Dqpu_validate.c96 if (inst->alu.add.op != V3D_QPU_A_NOP &&
154 if (inst->alu.add.op != V3D_QPU_A_NOP) {
263 if ((inst->alu.add.op != V3D_QPU_A_NOP &&
H A Dqpu_schedule.c368 if (inst->alu.add.op != V3D_QPU_A_NOP) {
534 if (inst->alu.add.op != V3D_QPU_A_NOP) {
689 if (inst->alu.add.op != V3D_QPU_A_NOP &&
878 assert(inst->alu.add.op != V3D_QPU_A_NOP);
883 inst->alu.add.op = V3D_QPU_A_NOP;
911 if (b->alu.add.op != V3D_QPU_A_NOP) {
912 if (a->alu.add.op == V3D_QPU_A_NOP) {
1267 if (inst->alu.add.op != V3D_QPU_A_NOP) {
1461 struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
1717 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP);
[all...]
H A Dv3d_compiler.h1368 return vir_emit_nondef(c, vir_add_inst(V3D_QPU_A_NOP,
1376 struct qinst *ldtmu = vir_add_inst(V3D_QPU_A_NOP, c->undef,
1400 struct qinst *ldtlb = vir_add_inst(V3D_QPU_A_NOP, c->undef,
1412 struct qinst *ldtlb = vir_add_inst(V3D_QPU_A_NOP, c->undef,
H A Dvir_dump.c263 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
H A Dvir.c37 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP)
134 inst->qpu.alu.add.op != V3D_QPU_A_NOP);
436 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP ||
H A Dnir_to_vir.c996 ldvary = vir_add_inst(V3D_QPU_A_NOP, c->undef,
2702 vir_add_inst(V3D_QPU_A_NOP, c->undef, c->undef, c->undef);
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dvir_to_qpu.c61 .op = V3D_QPU_A_NOP,
80 struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
145 qinst->qpu.alu.add.op != V3D_QPU_A_NOP ||
276 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP);
290 assert(qinst->qpu.alu.add.op == V3D_QPU_A_NOP);
295 } else if (qinst->qpu.alu.add.op != V3D_QPU_A_NOP) {
H A Dqpu_validate.c96 if (inst->alu.add.op != V3D_QPU_A_NOP &&
146 if (inst->alu.add.op != V3D_QPU_A_NOP) {
251 if ((inst->alu.add.op != V3D_QPU_A_NOP &&
H A Dqpu_schedule.c331 if (inst->alu.add.op != V3D_QPU_A_NOP) {
476 if (inst->alu.add.op != V3D_QPU_A_NOP) {
581 if (inst->alu.add.op != V3D_QPU_A_NOP &&
625 if (b->alu.add.op != V3D_QPU_A_NOP) {
626 if (a->alu.add.op != V3D_QPU_A_NOP)
831 if (inst->alu.add.op != V3D_QPU_A_NOP) {
1008 struct qinst *qinst = vir_add_inst(V3D_QPU_A_NOP, undef, undef, undef);
1136 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP);
H A Dvir_dump.c256 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP) {
H A Dvir.c34 if (inst->qpu.alu.add.op != V3D_QPU_A_NOP)
118 inst->qpu.alu.add.op != V3D_QPU_A_NOP);
394 assert(inst->qpu.alu.add.op == V3D_QPU_A_NOP ||
H A Dv3d_compiler.h1051 return vir_emit_nondef(c, vir_add_inst(V3D_QPU_A_NOP,
1059 struct qinst *ldtmu = vir_add_inst(V3D_QPU_A_NOP, c->undef,
H A Dnir_to_vir.c580 struct qinst *ldvary = vir_add_inst(V3D_QPU_A_NOP, c->undef,
/xsrc/external/mit/MesaLib/dist/src/broadcom/qpu/
H A Dqpu_instr.c119 [V3D_QPU_A_NOP] = "nop",
389 [V3D_QPU_A_NOP] = 0,
765 if (inst->alu.add.op != V3D_QPU_A_NOP &&
1035 if (inst->alu.add.op != V3D_QPU_A_NOP)
H A Dqpu_instr.h172 V3D_QPU_A_NOP, enumerator in enum:v3d_qpu_add_op
H A Dqpu_pack.c507 { 187, 187, 1 << 0, 1 << 0, V3D_QPU_A_NOP, 0 },
1183 if (instr->alu.add.op != V3D_QPU_A_NOP &&
/xsrc/external/mit/MesaLib.old/dist/src/broadcom/qpu/
H A Dqpu_instr.h172 V3D_QPU_A_NOP, enumerator in enum:v3d_qpu_add_op
H A Dqpu_instr.c113 [V3D_QPU_A_NOP] = "nop",
381 [V3D_QPU_A_NOP] = 0,
H A Dqpu_pack.c499 { 187, 187, 1 << 0, 1 << 0, V3D_QPU_A_NOP, 0 },
1135 if (instr->alu.add.op != V3D_QPU_A_NOP &&

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