Searched refs:VF (Results 1 - 17 of 17) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_formats.c380 #define VF(c, pf, type, size, bgra) \ macro
392 VF(A, B8G8R8A8_UNORM, UNORM, 8_8_8_8, 1),
393 VF(A, R8G8B8A8_UNORM, UNORM, 8_8_8_8, 0),
395 VF(A, R10G10B10A2_UNORM, UNORM, 10_10_10_2, 0),
396 VF(A, B10G10R10A2_UNORM, UNORM, 10_10_10_2, 1),
397 VF(A, R10G10B10A2_SNORM, SNORM, 10_10_10_2, 0),
398 VF(A, B10G10R10A2_SNORM, SNORM, 10_10_10_2, 1),
399 VF(A, R10G10B10A2_UINT, UINT, 10_10_10_2, 0),
400 VF(A, B10G10R10A2_UINT, UINT, 10_10_10_2, 1),
402 VF(
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/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/nv50/
H A Dnv50_formats.c380 #define VF(c, pf, type, size, bgra) \ macro
392 VF(A, B8G8R8A8_UNORM, UNORM, 8_8_8_8, 1),
393 VF(A, R8G8B8A8_UNORM, UNORM, 8_8_8_8, 0),
395 VF(A, R10G10B10A2_UNORM, UNORM, 10_10_10_2, 0),
396 VF(A, B10G10R10A2_UNORM, UNORM, 10_10_10_2, 1),
397 VF(A, R10G10B10A2_SNORM, SNORM, 10_10_10_2, 0),
398 VF(A, B10G10R10A2_SNORM, SNORM, 10_10_10_2, 1),
399 VF(A, R10G10B10A2_UINT, UINT, 10_10_10_2, 0),
400 VF(A, B10G10R10A2_UINT, UINT, 10_10_10_2, 1),
402 VF(
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/xsrc/external/mit/MesaLib/dist/docs/relnotes/
H A D21.3.7.rst132 - anv: invalidate L3 read only cache when VF cache is invalidated
133 - iris: invalidate L3 read only cache when VF cache is invalidated
H A D17.0.5.rst85 - anv/cmd_buffer: Flush the VF cache at the top of all primaries
H A D18.3.2.rst186 - i965: include draw_params/derived_draw_params for VF cache workaround
187 - i965: add CS stall on VF invalidation workaround
H A D18.1.8.rst123 - anv: Fill holes in the VF VUE to zero
H A D19.1.3.rst94 - intel/vec4: Reswizzle VF immediates too
H A D17.2.6.rst137 - i965: Implement another VF cache invalidate workaround on Gen8+.
H A D10.4.rst255 Pipeline statistic counter values for VF always 0
H A D12.0.2.rst162 - i965: Emit SKL VF cache invalidation W/A from
H A D19.0.0.rst1690 - i965: limit VF caching workaround to gen8/9/10
1691 - intel/blorp: emit VF caching workaround before 3DSTATE_VERTEX_BUFFERS
1692 - i965: include draw_params/derived_draw_params for VF cache workaround
1693 - i965: add CS stall on VF invalidation workaround
H A D20.0.0.rst1632 - blorp: Pass the VB size to the VF cache workaround
1633 - anv: Always invalidate the VF cache in BeginCommandBuffer
1635 - anv: Use PIPE_CONTROL flushes to implement the gen8 VF cache WA
1641 - anv: Stop advertising two heaps just for the VF cache WA
1940 - iris: Disable VF cache partial address workaround on Gen11+
H A D19.1.0.rst2605 - iris: fix VF instancing length so we don't get garbage in batch
2734 - iris: fix VF INSTANCING length
3226 - iris: CS stall on VF cache invalidate workarounds
H A D21.3.0.rst1672 - iris: Add read-only domain for VF cache.
1673 - iris: Annotate all BO uses through VF cache domain.
1674 - iris: Insert buffer-local memory barriers for VF reads.
H A D21.2.0.rst1772 - crocus/gen8: add VF topology support
1776 - crocus/gen8: add VF SGVS support.
/xsrc/external/mit/xf86-video-xgi/dist/src/
H A Dxgi_driver.c1952 float VF, HF; local in function:XGIInternalDDC
2046 VF = StdTiming[j].VRefresh;
2049 if (range->loV > VF)
2050 range->loV = VF;
2053 if (range->hiV < VF)
2054 range->hiV = VF;
2118 VF = HF / (pd_timings->v_active + pd_timings->v_blanking);
2124 if (range->loV > VF)
2125 range->loV = VF;
2126 if (range->hiV < VF)
6865 float VF, HF; local in function:XGIInternalDDC
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/xsrc/external/mit/MesaLib/dist/
H A D.pick_status.json4288 "description": "iris: invalidate L3 read only cache when VF cache is invalidated",
4297 "description": "anv: invalidate L3 read only cache when VF cache is invalidated",
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