Searched refs:Y_CHANNEL_SHIFT (Results 1 - 4 of 4) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Di915_3d.h292 #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) macro
293 #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4)
301 #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK)
323 (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Di915_3d.h292 #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) macro
293 #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4)
301 #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK)
323 (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen3_render.h1139 #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) macro
1140 #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4)
1148 #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK)
1170 (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen3_render.h1139 #define Y_CHANNEL_SHIFT (X_CHANNEL_SHIFT + 4) macro
1140 #define Z_CHANNEL_SHIFT (Y_CHANNEL_SHIFT + 4)
1148 #define REG_Y(reg) (((reg) >> Y_CHANNEL_SHIFT) & REG_CHANNEL_MASK)
1170 (y##_CHANNEL_VAL << Y_CHANNEL_SHIFT) | \

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