Searched refs:_3DPRIM_VERTEXBUFFER_ACCESS_RANDOM (Results 1 - 13 of 13) sorted by relevance

/xsrc/external/mit/xf86-video-intel/dist/src/uxa/
H A Dbrw_defines.h152 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
/xsrc/external/mit/xf86-video-intel/dist/xvmc/
H A Dbrw_defines.h152 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/uxa/
H A Dbrw_defines.h152 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/xvmc/
H A Dbrw_defines.h152 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
/xsrc/external/mit/xf86-video-intel-old/dist/src/
H A Dbrw_defines.h152 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
/xsrc/external/mit/xf86-video-intel/dist/src/sna/
H A Dgen6_render.h650 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
H A Dgen7_render.h336 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
H A Dgen4_render.h325 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
H A Dgen5_render.h413 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
/xsrc/external/mit/xf86-video-intel-2014/dist/src/sna/
H A Dgen6_render.h650 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
H A Dgen7_render.h336 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
H A Dgen4_render.h325 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro
H A Dgen5_render.h413 #define _3DPRIM_VERTEXBUFFER_ACCESS_RANDOM 1 macro

Completed in 61 milliseconds