| /xsrc/external/mit/libxshmfence/dist/src/ |
| H A D | xshmfence_futex.h | 60 static inline long sys_futex(void *addr1, int op, int val1, struct timespec *timeout, void *addr2, int val3) argument
62 return syscall(SYS_futex, addr1, op, val1, timeout, addr2, val3);
|
| /xsrc/external/mit/MesaLib.old/dist/src/util/ |
| H A D | futex.h | 36 static inline long sys_futex(void *addr1, int op, int val1, const struct timespec *timeout, void *addr2, int val3) argument
38 return syscall(SYS_futex, addr1, op, val1, timeout, addr2, val3);
|
| /xsrc/external/mit/MesaLib/dist/src/util/ |
| H A D | futex.h | 37 static inline long sys_futex(void *addr1, int op, int val1, const struct timespec *timeout, void *addr2, int val3) argument
39 return syscall(SYS_futex, addr1, op, val1, timeout, addr2, val3);
|
| /xsrc/external/mit/MesaLib/dist/src/freedreno/ir3/ |
| H A D | ir3_sched.c | 99 struct ir3_instruction *addr1; /* current a1.x user, if any */ member in struct:ir3_sched_ctx
270 debug_assert(ctx->addr1 == NULL);
271 ctx->addr1 = instr;
443 if (writes_addr1(instr) && ctx->addr1) {
444 debug_assert(ctx->addr1 != instr);
1125 ctx->addr1 = NULL;
1207 split_addr(ctx, &ctx->addr1, ir->a1_users, ir->a1_users_count);
|
| /xsrc/external/mit/MesaLib/dist/src/compiler/nir/ |
| H A D | nir_lower_io.c | 2561 nir_build_addr_ieq(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1, argument
2572 return nir_ball_iequal(b, addr0, addr1);
2576 nir_channels(b, addr1, 0xb));
2579 assert(addr0->num_components == 1 && addr1->num_components == 1);
2580 return nir_ieq(b, nir_u2u32(b, addr0), nir_u2u32(b, addr1));
2583 assert(addr0->num_components == 1 && addr1->num_components == 1);
2584 return nir_ball_iequal(b, nir_unpack_64_2x32(b, addr0), nir_unpack_64_2x32(b, addr1));
2594 nir_build_addr_isub(nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1, argument
2604 assert(addr1->num_components == 1);
2605 return nir_isub(b, addr0, addr1);
[all...] |
| H A D | nir.h | 4919 nir_ssa_def *nir_build_addr_ieq(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
4922 nir_ssa_def *nir_build_addr_isub(struct nir_builder *b, nir_ssa_def *addr0, nir_ssa_def *addr1,
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/sfn/ |
| H A D | sfn_nir_lower_tess_io.cpp | 107 nir_ssa_def *addr1 = r600_umad_24(b, nir_channel(b, base, 0), local in function:emil_lsd_out_addr
111 op->src[src_offset].ssa, addr1);
517 nir_ssa_def *addr1 = nir_iadd(b, addr0, load_offset_group(b, 4 + inner_comps)); local in function:r600_append_tcs_TF_emission
520 tf_inner->src[0] = nir_src_for_ssa(addr1);
|
| /xsrc/external/mit/xf86-video-savage/dist/src/ |
| H A D | savage_video.c | 1792 CARD32 addr1, addr2;
1848 addr1 = addr0 + (width * height); /* Cb in in YCbCr420 */
1849 addr2 = addr1 + ((width * height) / 4); /* Cr in in YCbCr420 */
1853 OUTREG(SEC_STREAM_FBUF_ADDR1, (addr1) & (0x3fffff & ~BASE_PAD));
|
| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_peephole.cpp | 3913 int32_t addr1, addr2; local in function:nv50_ir::DeadCodeElim::checkSplitLoad
3924 addr1 = ld1->getSrc(0)->reg.data.offset;
3931 if (size1 && (addr1 & 0x7))
3937 addr1 += ld1->getDef(d)->reg.size;
3953 for (addr2 = addr1 + size1; ld1->defExists(d); ++d) {
3970 updateLdStOffset(ld1, addr1, func);
|
| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/nouveau/codegen/ |
| H A D | nv50_ir_peephole.cpp | 3991 int32_t addr1, addr2; local in function:nv50_ir::DeadCodeElim::checkSplitLoad
4002 addr1 = ld1->getSrc(0)->reg.data.offset;
4009 if (size1 && (addr1 & 0x7))
4015 addr1 += ld1->getDef(d)->reg.size;
4031 for (addr2 = addr1 + size1; ld1->defExists(d); ++d) {
4048 updateLdStOffset(ld1, addr1, func);
|
| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_instruction_selection.cpp | 6755 Temp addr0 = bld.tmp(v1), addr1 = bld.tmp(v1); local in function:aco::__anon562fcc110110::visit_store_global
6758 bld.pseudo(aco_opcode::p_split_vector, Definition(addr0), Definition(addr1), addr);
6763 Operand::zero(), addr1, carry)
|