Searched refs:after_inst (Results 1 - 6 of 6) sorted by relevance

/xsrc/external/mit/MesaLib.old/dist/src/broadcom/compiler/
H A Dqpu_schedule.c915 const struct v3d_qpu_instr *after_inst = &after->inst->qpu; local in function:instruction_latency
919 after_inst->type != V3D_QPU_INSTR_TYPE_ALU)
925 after_inst));
931 after_inst));
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu_schedule.c760 uint64_t after_inst = after->inst->inst; local in function:instruction_latency
763 after_inst),
765 after_inst));
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/vc4/
H A Dvc4_qpu_schedule.c760 uint64_t after_inst = after->inst->inst; local in function:instruction_latency
763 after_inst),
765 after_inst));
/xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/
H A Dqpu_schedule.c1360 const struct v3d_qpu_instr *after_inst = &after->inst->qpu; local in function:instruction_latency
1364 after_inst->type != V3D_QPU_INSTR_TYPE_ALU)
1371 after_inst));
1378 after_inst));
/xsrc/external/mit/MesaLib.old/dist/src/intel/compiler/
H A Dbrw_fs.cpp6520 * Since we're inserting split instructions after after_inst, the
6553 exec_node *const after_inst = inst->next; local in function:fs_visitor::lower_simd_width
6573 lbld.at(block, after_inst), inst);
/xsrc/external/mit/MesaLib/dist/src/intel/compiler/
H A Dbrw_fs.cpp7833 * Since we're inserting split instructions after after_inst, the
7866 exec_node *const after_inst = inst->next; local in function:fs_visitor::lower_simd_width
7886 lbld.at(block, after_inst), inst);

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