| /xsrc/external/mit/MesaLib.old/dist/src/mesa/main/ |
| H A D | marshal.h | 58 const size_t aligned_size = ALIGN(size, 8); local in function:_mesa_glthread_allocate_command
66 next->used += aligned_size;
68 cmd_base->cmd_size = aligned_size;
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| /xsrc/external/mit/MesaLib/dist/src/broadcom/compiler/ |
| H A D | v3d_nir_lower_robust_buffer_access.c | 97 nir_ssa_def *aligned_size = local in function:lower_shared
99 nir_ssa_def *offset = nir_umin(b, instr->src[0].ssa, aligned_size);
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_compute_blit.c | 247 uint64_t aligned_size = size & ~3ull; local in function:si_clear_buffer
248 if (aligned_size >= 4) {
259 aligned_size, clear_value,
264 aligned_size, *clear_value, 0, coher,
268 offset += aligned_size;
269 size -= aligned_size;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/ |
| H A D | si_compute_blit.c | 334 uint64_t aligned_size = size & ~3ull; local in function:si_clear_buffer
335 if (aligned_size >= 4) {
354 si_compute_do_clear_or_copy(sctx, dst, offset, NULL, 0, aligned_size, clear_value,
358 si_cp_dma_clear_buffer(sctx, &sctx->gfx_cs, dst, offset, aligned_size, *clear_value,
362 offset += aligned_size;
363 size -= aligned_size;
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/ |
| H A D | compute_memory_pool.c | 604 int64_t aligned_size = pool->size_in_dw; local in function:compute_memory_transfer
619 &(struct pipe_box) { .width = aligned_size * 4,
627 &(struct pipe_box) { .width = aligned_size * 4,
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| /xsrc/external/mit/MesaLib.old/dist/src/intel/isl/ |
| H A D | isl_surface_state.c | 698 uint64_t aligned_size = isl_align(buffer_size, 4); local in function:isl_genX
699 buffer_size = aligned_size + (aligned_size - buffer_size);
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| /xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/ |
| H A D | compute_memory_pool.c | 603 int64_t aligned_size = pool->size_in_dw; local in function:compute_memory_transfer
618 &(struct pipe_box) { .width = aligned_size * 4,
626 &(struct pipe_box) { .width = aligned_size * 4,
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/winsys/amdgpu/drm/ |
| H A D | amdgpu_bo.c | 1574 uint64_t aligned_size = align64(size, ws->info.gart_page_size); local in function:amdgpu_bo_from_ptr
1581 aligned_size, &buf_handle))
1585 aligned_size,
1586 amdgpu_get_optimal_vm_alignment(ws, aligned_size,
1591 if (amdgpu_bo_va_op(buf_handle, 0, aligned_size, va, 0, AMDGPU_VA_OP_MAP))
1609 ws->allocated_gtt += aligned_size;
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| /xsrc/external/mit/MesaLib/dist/src/gallium/winsys/amdgpu/drm/ |
| H A D | amdgpu_bo.c | 1702 uint64_t aligned_size = align64(size, ws->info.gart_page_size); local in function:amdgpu_bo_from_ptr
1709 aligned_size, &buf_handle))
1713 aligned_size,
1714 amdgpu_get_optimal_alignment(ws, aligned_size,
1719 if (amdgpu_bo_va_op(buf_handle, 0, aligned_size, va, 0, AMDGPU_VA_OP_MAP))
1736 ws->allocated_gtt += aligned_size;
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| /xsrc/external/mit/MesaLib/dist/src/intel/isl/ |
| H A D | isl_surface_state.c | 876 uint64_t aligned_size = isl_align(buffer_size, 4); local in function:isl_genX
877 buffer_size = aligned_size + (aligned_size - buffer_size);
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| /xsrc/external/mit/MesaLib/dist/src/microsoft/clc/ |
| H A D | compute_test.cpp | 407 unsigned aligned_size = align(size, 256); local in function:ComputeTest::add_cbv_resource
415 res = create_sized_buffer_with_data(aligned_size, data, size);
417 create_cbv(res, aligned_size, handle);
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| /xsrc/external/mit/freetype/dist/src/sfnt/ |
| H A D | sfwoff2.c | 289 FT_ULong aligned_size = size & ~3UL; local in function:compute_ULong_sum
294 for ( i = 0; i < aligned_size; i += 4 )
301 if ( size != aligned_size )
304 for ( i = aligned_size ; i < size; ++i )
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| /xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 1144 uint64_t aligned_size = ((va + size + SI_CPDMA_ALIGNMENT -1) & ~(SI_CPDMA_ALIGNMENT - 1)) - aligned_va; local in function:si_cp_dma_prefetch
1147 aligned_size, CP_DMA_USE_L2);
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| /xsrc/external/mit/MesaLib/dist/src/broadcom/vulkan/ |
| H A D | v3dv_device.c | 2400 const VkDeviceSize aligned_size = align64(buffer->size, buffer->alignment); local in function:v3dv_CreateBuffer
2401 if (aligned_size > UINT32_MAX || aligned_size < buffer->size)
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| /xsrc/external/mit/MesaLib/dist/src/amd/vulkan/ |
| H A D | si_cmd_buffer.c | 1520 uint64_t aligned_size = local in function:si_cp_dma_prefetch
1523 si_emit_cp_dma(cmd_buffer, aligned_va, aligned_va, aligned_size, CP_DMA_USE_L2);
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| /xsrc/external/mit/MesaLib/dist/src/panfrost/lib/ |
| H A D | pan_indirect_draw.c | 692 nir_ssa_def *aligned_size = local in function:update_varying_buf
704 get_address(b, var_mem_ptr, aligned_size), 3);
|