| /xsrc/external/mit/MesaLib/dist/src/compiler/glsl/ |
| H A D | lower_packing_builtins.cpp | 218 return bitfield_insert(bit_and(swizzle_x(u), constant(0xffffu)),
226 bit_and(swizzle_x(u), constant(0xffffu)));
250 bit_and(swizzle_x(u), constant(0xffu)),
257 factory.emit(assign(u, bit_and(uvec4_rval, constant(0xffu))));
288 factory.emit(assign(u2, bit_and(u, constant(0xffffu)), WRITEMASK_X));
351 factory.emit(assign(u4, bit_and(u, constant(0xffu)), WRITEMASK_X));
363 factory.emit(assign(u4, bit_and(rshift(u, constant(8u)),
367 factory.emit(assign(u4, bit_and(rshift(u, constant(16u)),
1039 factory.emit(assign(e, bit_and(f32, constant(0x7f800000u))));
1047 factory.emit(assign(m, bit_and(f3
[all...] |
| H A D | lower_instructions.cpp | 483 bit_and(bitcast_f2u(x),
511 bit_and(sign_mantissa,
613 i.insert_before(assign(unpacked, bit_and(swizzle_y(unpacked), sign_mask->clone(ir, NULL)),
725 i.insert_before(assign(bits, bit_and(bits, sign_mantissa_mask)));
1085 base_ir->insert_before(assign(temp, sub(temp, bit_and(rshift(temp, c1),
1089 base_ir->insert_before(assign(temp, add(bit_and(temp, c33333333),
1090 bit_and(rshift(temp, c2),
1096 ir->operands[0] = rshift(mul(bit_and(add(temp, rshift(temp, c4)), c0F0F0F0F),
1238 ir->operands[0] = bit_and(ir->operands[0], bit_not(mask));
1239 ir->operands[1] = bit_and(lshif
[all...] |
| H A D | ir_builder.h | 174 ir_expression *bit_and(operand a, operand b);
|
| H A D | ir_builder.cpp | 414 bit_and(operand a, operand b) function in namespace:ir_builder
|
| H A D | builtin_functions.cpp | 7042 body.emit(assign(bits, bit_and(bits, sign_mantissa_mask)));
|
| /xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/ |
| H A D | lower_packing_builtins.cpp | 218 return bitfield_insert(bit_and(swizzle_x(u), constant(0xffffu)),
226 bit_and(swizzle_x(u), constant(0xffffu)));
250 bit_and(swizzle_x(u), constant(0xffu)),
257 factory.emit(assign(u, bit_and(uvec4_rval, constant(0xffu))));
288 factory.emit(assign(u2, bit_and(u, constant(0xffffu)), WRITEMASK_X));
351 factory.emit(assign(u4, bit_and(u, constant(0xffu)), WRITEMASK_X));
363 factory.emit(assign(u4, bit_and(rshift(u, constant(8u)),
367 factory.emit(assign(u4, bit_and(rshift(u, constant(16u)),
1039 factory.emit(assign(e, bit_and(f32, constant(0x7f800000u))));
1047 factory.emit(assign(m, bit_and(f3
[all...] |
| H A D | lower_instructions.cpp | 476 bit_and(bitcast_f2u(x),
504 bit_and(sign_mantissa,
606 i.insert_before(assign(unpacked, bit_and(swizzle_y(unpacked), sign_mask->clone(ir, NULL)),
718 i.insert_before(assign(bits, bit_and(bits, sign_mantissa_mask)));
1077 base_ir->insert_before(assign(temp, sub(temp, bit_and(rshift(temp, c1),
1081 base_ir->insert_before(assign(temp, add(bit_and(temp, c33333333),
1082 bit_and(rshift(temp, c2),
1088 ir->operands[0] = rshift(mul(bit_and(add(temp, rshift(temp, c4)), c0F0F0F0F),
1230 ir->operands[0] = bit_and(ir->operands[0], bit_not(mask));
1231 ir->operands[1] = bit_and(lshif
[all...] |
| H A D | ir_builder.h | 174 ir_expression *bit_and(operand a, operand b);
|
| H A D | ir_builder.cpp | 414 bit_and(operand a, operand b) function in namespace:ir_builder
|
| H A D | builtin_functions.cpp | 6563 body.emit(assign(bits, bit_and(bits, sign_mantissa_mask)));
|