| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/tests/ |
| H A D | test_sdwa.cpp | 80 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(4u), inputs[1]); 81 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], Operand::c32(4u)); 86 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x1234u), inputs[1]); 87 bld.vop2_sdwa(aco_opcode::v_mul_f32, bld.def(v1), inputs[0], Operand::c32(0x1234u)); 171 Temp bfe_byte0_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::zero(), Operand::c32(8u), 172 Operand::c32(is_signed)); 176 Temp bfe_byte1_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32(1u), Operand::c32(8u), 177 Operand::c32(is_signed)); 181 Temp bfe_byte2_b = bld.pseudo(ext, bld.def(v1), inputs[1], Operand::c32( [all...] |
| H A D | test_hard_clause.cpp | 114 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u)); 122 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u)); 130 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u)); 138 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u)); 145 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u)); 152 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(6u)); 159 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(7u)); 179 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u)); 187 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u)); 198 bld.pseudo(aco_opcode::p_unit_test, Operand::c32( [all...] |
| H A D | test_to_hw_instr.cpp | 63 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u)); 73 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u)); 84 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u)); 98 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u)); 107 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u)); 116 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(6u)); 126 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(7u)); 138 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(8u)); 148 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(9u)); 157 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1 [all...] |
| H A D | test_insert_nops.cpp | 69 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u)); 77 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u)); 86 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u)); 95 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(4u)); 106 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(5u)); 134 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(1u)); 144 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(2u)); 157 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(3u));
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| H A D | test_optimizer.cpp | 44 writeout(1, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x123456u), neg_a)); 100 writeout(0, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x3f000000u), tmp)); 105 writeout(1, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x40000000u), tmp)); 110 writeout(2, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x40800000u), tmp)); 116 Operand::c32(0x3f800000u), tmp)); 121 tmp = bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x40000000u), tmp); 123 Operand::c32(0x3f800000u), tmp)); 161 tmp = bld.vop3(aco_opcode::v_med3_f32, bld.def(v1), Operand::zero(), Operand::c32(0x3f800000u), 163 writeout(10, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x40000000u), tmp)); 171 writeout(11, bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32( [all...] |
| H A D | test_optimizer_postRA.cpp | 102 Operand::c32(1u), Operand(reg_s4, bld.lm)); 121 auto ovrwr = bld.sop1(Builder::s_mov, bld.def(bld.lm, exec), Operand::c32(42u)); 158 Operand::c32(0x40018u)); 172 Operand::c32(0x40018u)); 186 Operand::c32(0x40018u)); 200 Operand::c32(0x40018u)); 214 Operand::c32(0x12345u)); 232 Operand::c32(0x40018u)); 234 Operand::c32(1u)); 248 Operand::c32( [all...] |
| H A D | helpers.cpp | 245 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), tmp); 247 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i)); 252 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), res); 257 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), op); 262 bld.pseudo(aco_opcode::p_unit_test, Operand::c32(i), op0, op1); 267 return bld.vop2(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0xbf800000u), src); 273 bld.vop2_e64(aco_opcode::v_mul_f32, bld.def(v1), Operand::c32(0x3f800000u), src);
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| H A D | test_regalloc.cpp | 173 Temp tmp = bld.pseudo(aco_opcode::p_extract_vector, bld.def(v1b), inputs[0], Operand::c32(4u));
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | aco_lower_to_hw_instr.cpp | 483 identity[0] = Operand::c32(get_reduction_identity(reduce_op, 0)); 484 identity[1] = Operand::c32(get_reduction_identity(reduce_op, 1)); 532 Operand::c32(8u)); 555 Operand::c32(16u)); 649 bld.sop1(aco_opcode::s_mov_b32, Definition(exec_lo, s1), Operand::c32(0x10000u)); 650 bld.sop1(aco_opcode::s_mov_b32, Definition(exec_hi, s1), Operand::c32(0x10000u)); 654 Operand(PhysReg{tmp + i}, v1), Operand::c32(0xffffffffu), 655 Operand::c32(0xffffffffu)) 665 Operand::c32(31u)); 667 Operand::c32(3 [all...] |
| H A D | aco_instruction_selection.cpp | 143 Operand mask_lo = mask.isUndefined() ? Operand::c32(-1u) : mask; 147 Operand mask_lo = Operand::c32(-1u); 148 Operand mask_hi = Operand::c32(-1u); 209 bld.vopc(aco_opcode::v_cmp_ge_u32, bld.def(bld.lm), Operand::c32(31u), index); 216 Operand index_x4 = bld.vop2(aco_opcode::v_lshlrev_b32, bld.def(v1), Operand::c32(2u), index); 231 Temp index_x4 = bld.vop2(aco_opcode::v_lshlrev_b32, bld.def(v1), Operand::c32(2u), index); 286 bld.vop2(aco_opcode::v_lshrrev_b32, Definition(dst), Operand::c32(util_logbase2(b)), a); 307 bld.vop2(aco_opcode::v_lshrrev_b32, Definition(pre_shift_dst), Operand::c32(info.pre_shift), 314 bld.vadd32(Definition(increment_dst), Operand::c32(info.increment), pre_shift_dst); 321 bld.copy(bld.def(v1), Operand::c32(inf [all...] |
| H A D | aco_spill.cpp | 350 reload->operands[0] = Operand::c32(spill_id); 911 spill->operands[1] = Operand::c32(spill_id); 967 spill->operands[1] = Operand::c32(pair.second); 1258 spill->operands[1] = Operand::c32(spill_id); 1411 scratch_offset, Operand::c32(offset)); 1429 Operand::c32(-1u), Operand::c32(rsrc_conf)); 1720 spill->operands[1] = Operand::c32(spill_slot % ctx.wave_size); 1804 reload->operands[1] = Operand::c32(spill_slot % ctx.wave_size);
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| H A D | aco_optimizer.cpp | 1117 instr->operands[2] = Operand::c32(0); 1188 instr->operands[i] = Operand::c32(info.val); 1199 smem.operands[1] = Operand::c32(offset); 1205 new_instr->operands[1] = Operand::c32(offset); 2282 Operand::c32(extins->operands[1].constantValue() * extins->operands[2].constantValue()); 2289 operands[1] = Operand::c32(extins->operands[2].constantEquals(8) ? 0xffu : 0xffffu); 3046 Operand::c32(multiplier), 3692 Operand::c32((uint32_t)split_offset / instr->definitions[idx].bytes()); 3884 literal = Operand::c32(ctx.info[op.tempId()].val); 3950 Operand::c32(ct [all...] |
| /xsrc/external/mit/xorg-server/dist/xkb/ |
| H A D | xkbSwap.c | 74 CARD32 *c32; member in union:SProcXkbSelectEvents::__anon079be591010a 116 swapl(&from.c32[0]); 117 swapl(&from.c32[1]);
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| /xsrc/external/mit/xorg-server.old/dist/xkb/ |
| H A D | xkbSwap.c | 78 CARD32 *c32; member in union:SProcXkbSelectEvents::__anondac8215e010a 120 swapl(&from.c32[0],n); 121 swapl(&from.c32[1],n);
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| /xsrc/external/mit/MesaLib.old/dist/src/util/tests/fast_idiv_by_const/ |
| H A D | fast_idiv_by_const_test.cpp | 99 uint32_t c32[2] = { (uint32_t)c, (uint32_t)(c >> 32) }; local in function:umul_add_high 105 ubm_add_u32arr(abc32, ab32, c32);
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| /xsrc/external/mit/MesaLib/dist/src/util/tests/fast_idiv_by_const/ |
| H A D | fast_idiv_by_const_test.cpp | 96 uint32_t c32[2] = { (uint32_t)c, (uint32_t)(c >> 32) }; local in function:umul_add_high 102 ubm_add_u32arr(abc32, ab32, c32);
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| /xsrc/external/mit/MesaLib/dist/src/compiler/glsl/ |
| H A D | lower_instructions.cpp | 1115 ir_constant *c32 = local in function:lower_instructions_visitor::extract_to_shifts 1125 ir_expression *mask = csel(equal(bits, c32), 1146 ir_constant *c32 = local in function:lower_instructions_visitor::extract_to_shifts 1153 base_ir->insert_before(assign(temp, sub(c32, bits))); 1183 ir_constant *c32; local in function:lower_instructions_visitor::insert_to_shifts 1194 c32 = new(ir) ir_constant(int(32), ir->operands[0]->type->vector_elements); 1200 c32 = new(ir) ir_constant(32u, ir->operands[0]->type->vector_elements); 1229 base_ir->insert_before(assign(mask, csel(equal(bits, c32),
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| /xsrc/external/mit/MesaLib.old/dist/src/compiler/glsl/ |
| H A D | lower_instructions.cpp | 1107 ir_constant *c32 = local in function:lower_instructions_visitor::extract_to_shifts 1117 ir_expression *mask = csel(equal(bits, c32), 1138 ir_constant *c32 = local in function:lower_instructions_visitor::extract_to_shifts 1145 base_ir->insert_before(assign(temp, sub(c32, bits))); 1175 ir_constant *c32; local in function:lower_instructions_visitor::insert_to_shifts 1186 c32 = new(ir) ir_constant(int(32), ir->operands[0]->type->vector_elements); 1192 c32 = new(ir) ir_constant(32u, ir->operands[0]->type->vector_elements); 1221 base_ir->insert_before(assign(mask, csel(equal(bits, c32),
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| /xsrc/external/mit/libX11/dist/src/xkb/ |
| H A D | XKB.c | 150 CARD32 *c32; member in union:XkbSelectEventDetails::__anon38d35e1a010a 215 u.c32[0] = (CARD32) affect; 216 u.c32[1] = (CARD32) details;
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| /xsrc/external/mit/libXfontcache/dist/ |
| H A D | config.sub | 470 convex-c32) 471 basic_machine=c32-convex
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| /xsrc/external/mit/libxkbui/dist/ |
| H A D | config.sub | 424 convex-c32) 425 basic_machine=c32-convex
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| /xsrc/external/mit/glw/dist/ |
| H A D | config.sub | 499 convex-c32) 500 basic_machine=c32-convex
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| /xsrc/external/mit/xf86-video-imstt/dist/ |
| H A D | config.sub | 424 convex-c32) 425 basic_machine=c32-convex
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| /xsrc/external/mit/xf86-video-intel-old/dist/ |
| H A D | config.sub | 470 convex-c32) 471 basic_machine=c32-convex
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| /xsrc/external/mit/xf86-video-nsc/dist/ |
| H A D | config.sub | 424 convex-c32) 425 basic_machine=c32-convex
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