Searched refs:cb_color_base (Results 1 - 18 of 18) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/radeonsi/
H A Dsi_state.c3051 uint64_t cb_color_base, cb_color_fmask, cb_color_cmask, cb_dcc_base; local in function:si_emit_framebuffer_state
3076 cb_color_base = tex->buffer.gpu_address >> 8;
3125 cb_color_base += tex->surface.u.gfx9.surf_offset >> 8;
3126 cb_color_base |= tex->surface.tile_swizzle;
3128 cb_color_fmask = cb_color_base;
3130 cb_color_cmask = cb_color_base;
3139 radeon_emit(cb_color_base); /* CB_COLOR0_BASE */
3154 radeon_set_context_reg(R_028E40_CB_COLOR0_BASE_EXT + i * 4, cb_color_base >> 32);
3172 cb_color_base += tex->surface.u.gfx9.surf_offset >> 8;
3173 cb_color_base |
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/radeonsi/
H A Dsi_state.c3039 uint64_t cb_color_base, cb_color_fmask, cb_color_cmask, cb_dcc_base; local in function:si_emit_framebuffer_state
3072 cb_color_base = tex->buffer.gpu_address >> 8;
3111 cb_color_base += tex->surface.u.gfx9.surf_offset >> 8;
3112 cb_color_base |= tex->surface.tile_swizzle;
3114 cb_color_fmask = cb_color_base;
3116 cb_color_cmask = cb_color_base;
3123 radeon_emit(cs, cb_color_base); /* CB_COLOR0_BASE */
3124 radeon_emit(cs, S_028C64_BASE_256B(cb_color_base >> 32)); /* CB_COLOR0_BASE_EXT */
3148 cb_color_base += level_info->offset >> 8;
3151 cb_color_base |
[all...]
/xsrc/external/mit/MesaLib.old/dist/src/gallium/drivers/r600/
H A Dr600_pipe_common.h263 unsigned cb_color_base; member in struct:r600_surface
H A Dr600_pipe.h454 uint32_t cb_color_base; member in struct:r600_image_view
H A Dr600_state.c950 surf->cb_color_base = offset >> 8;
953 surf->cb_color_fmask = surf->cb_color_base;
954 surf->cb_color_cmask = surf->cb_color_base;
1382 radeon_set_context_reg(cs, R_028040_CB_COLOR0_BASE + i*4, cb[i]->cb_color_base);
H A Devergreen_state.c1298 surf->cb_color_base = color.offset;
1334 surf->cb_color_base = color.offset;
1747 radeon_emit(cs, image->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
1754 radeon_emit(cs, rtex ? rtex->cmask.base_address_reg : image->cb_color_base); /* R_028C7C_CB_COLOR0_CMASK */
1877 radeon_emit(cs, cb->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
4097 rview->cb_color_base = color.offset;
4254 rview->cb_color_base = color.offset;
H A Devergreen_compute.c672 radeon_emit(cs, cb->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/r600/
H A Dr600_pipe_common.h259 unsigned cb_color_base; member in struct:r600_surface
H A Dr600_pipe.h459 uint32_t cb_color_base; member in struct:r600_image_view
H A Dr600_state.c953 surf->cb_color_base = offset >> 8;
956 surf->cb_color_fmask = surf->cb_color_base;
957 surf->cb_color_cmask = surf->cb_color_base;
1385 radeon_set_context_reg(cs, R_028040_CB_COLOR0_BASE + i*4, cb[i]->cb_color_base);
H A Devergreen_state.c1304 surf->cb_color_base = color.offset;
1340 surf->cb_color_base = color.offset;
1753 radeon_emit(cs, image->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
1760 radeon_emit(cs, rtex ? rtex->cmask.base_address_reg : image->cb_color_base); /* R_028C7C_CB_COLOR0_CMASK */
1883 radeon_emit(cs, cb->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
4117 rview->cb_color_base = color.offset;
4276 rview->cb_color_base = color.offset;
H A Devergreen_compute.c694 radeon_emit(cs, cb->cb_color_base); /* R_028C60_CB_COLOR0_BASE */
/xsrc/external/mit/MesaLib.old/dist/src/amd/vulkan/
H A Dradv_device.c4252 cb->cb_color_base = va >> 8;
4266 cb->cb_color_base += surf->u.gfx9.surf_offset >> 8;
4267 cb->cb_color_base |= surf->tile_swizzle;
4274 cb->cb_color_base += level_info->offset >> 8;
4276 cb->cb_color_base |= surf->tile_swizzle;
4328 cb->cb_color_fmask = cb->cb_color_base;
H A Dradv_private.h1801 uint64_t cb_color_base; member in struct:radv_color_buffer_info
H A Dradv_cmd_buffer.c1057 radeon_emit(cmd_buffer->cs, cb->cb_color_base);
1058 radeon_emit(cmd_buffer->cs, S_028C64_BASE_256B(cb->cb_color_base >> 32));
1077 radeon_emit(cmd_buffer->cs, cb->cb_color_base);
/xsrc/external/mit/MesaLib/dist/src/amd/vulkan/
H A Dradv_device.c6611 cb->cb_color_base = va >> 8;
6635 cb->cb_color_base += surf->u.gfx9.surf_offset >> 8;
6636 cb->cb_color_base |= surf->tile_swizzle;
6641 cb->cb_color_base += level_info->offset_256B;
6643 cb->cb_color_base |= surf->tile_swizzle;
6705 cb->cb_color_fmask = cb->cb_color_base;
H A Dradv_cmd_buffer.c1754 radeon_emit(cmd_buffer->cs, cb->cb_color_base);
1769 cb->cb_color_base >> 32);
1782 radeon_emit(cmd_buffer->cs, cb->cb_color_base);
1783 radeon_emit(cmd_buffer->cs, S_028C64_BASE_256B(cb->cb_color_base >> 32));
1802 radeon_emit(cmd_buffer->cs, cb->cb_color_base);
H A Dradv_private.h1244 uint64_t cb_color_base; member in struct:radv_color_buffer_info

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