Searched refs:coherent_seqnos (Results 1 - 2 of 2) sorted by relevance

/xsrc/external/mit/MesaLib/dist/src/gallium/drivers/iris/
H A Diris_batch.h145 * coherent_seqnos[i][j] denotes the seqno of the most recent flush of
147 * coherent_seqnos[i][i] is the most recent flush of cache domain i). This
152 uint64_t coherent_seqnos[NUM_IRIS_DOMAINS][NUM_IRIS_DOMAINS]; member in struct:iris_batch
335 batch->coherent_seqnos[access][access] = batch->next_seqno - 1;
348 batch->coherent_seqnos[access][i] = batch->coherent_seqnos[i][i];
361 batch->coherent_seqnos[i][j] = batch->next_seqno - 1;
H A Diris_pipe_control.c180 * have for the local seqno (see the coherent_seqnos comparisons below).
223 if (seqno > batch->coherent_seqnos[access][i]) {
226 if (seqno > batch->coherent_seqnos[i][i])
245 if (seqno > batch->coherent_seqnos[i][i])
263 if (seqno > batch->coherent_seqnos[access][i]) {
266 if (seqno > batch->coherent_seqnos[i][i])

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