| /xsrc/external/mit/xterm/dist/vttests/ |
| H A D | query-status.pl | 50 -a test ANSI colors with SGR controls 51 -c test cursor appearance with DECSCUSR controls 52 -d test direct colors with SGR controls 53 -8 use 8-bit controls 55 Options which use C1 controls may not work with UTF-8.
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| H A D | 256colors2.pl | 54 -8 use 8-bit controls 62 -u use UTF-8 when emitting 8-bit controls
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| H A D | 88colors2.pl | 55 -8 use 8-bit controls 63 -u use UTF-8 when emitting 8-bit controls
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| H A D | query-dynamic.pl | 65 -8 use 8-bit controls
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| H A D | lrmm-scroll.pl | 344 -8 use 8-bit C1 controls
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| H A D | setpos.pl | 49 -8 use 8-bit controls
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| H A D | xtra-scroll.pl | 352 -8 use 8-bit controls
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| H A D | titlestack.pl | 607 -8 use 8-bit controls
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/ |
| H A D | debugging.rst | 20 This option controls if the debug variables should be printed to stderr. This 41 Gallium has a built-in shader sanity checker. This option controls whether
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| /xsrc/external/mit/xorg-server/dist/hw/kdrive/ephyr/ |
| H A D | hostx.h | 152 hostx_load_keymap(KeySymsPtr keySyms, CARD8 *modmap, XkbControlsPtr controls);
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| H A D | ephyr.c | 1325 XkbControlsRec controls; local in function:EphyrKeyboardInit 1330 if (hostx_load_keymap(&keySyms, modmap, &controls)) { 1335 XkbDDXChangeControls(ki->dixdev, &controls, &controls);
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| /xsrc/external/mit/xf86-video-intel-old/dist/m4/ |
| H A D | shave.m4 | 8 dnl controls shave's behaviour when no option has been
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/cso/ |
| H A D | dsa.rst | 41 Stencil test writemask; this controls which bits of the stencil buffer
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| H A D | velems.rst | 6 This state controls the format of the input attributes contained in
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| H A D | blend.rst | 6 This state controls blending of the final fragments into the target rendering
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| /xsrc/external/mit/MesaLib/dist/docs/gallium/cso/ |
| H A D | dsa.rst | 41 Stencil test writemask; this controls which bits of the stencil buffer
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| H A D | velems.rst | 6 This state controls the format of the input attributes contained in
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| H A D | blend.rst | 6 This state controls blending of the final fragments into the target rendering
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| /xsrc/external/mit/xorg-server/dist/ |
| H A D | README.md | 10 which usually communicates with the user via graphical controls such as buttons
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| /xsrc/external/mit/xterm/dist/ |
| H A D | graphics_regis.c | 76 /* controls for extensions over VT3x0 limitations */ 4604 RegisDataFragment *controls, 4611 while (!fragment_consumed(controls)) { 4612 if (skip_regis_whitespace(controls)) 4615 if (extract_regis_parenthesized_data(controls, &optionset)) { 4639 TRACE(("DATA_ERROR: skipping unknown token in write controls (expecting optionset): \"%s\"\n", 4640 fragment_to_tempstr(controls))); 4641 pop_fragment(controls); 4649 RegisWriteControls *controls) 4651 controls 4601 load_regis_write_control_set(RegisParseState * state,RegisGraphicsContext const * context,int cur_x,int cur_y,RegisDataFragment * controls,RegisWriteControls * out) argument 4648 init_regis_write_controls(int graphics_termid,unsigned all_planes,RegisWriteControls * controls) argument 4760 init_regis_text_controls(RegisTextControls * controls) argument [all...] |
| /xsrc/external/mit/MesaLib/dist/docs/gallium/ |
| H A D | debugging.rst | 20 This option controls if the debug variables should be printed to stderr. This 54 Gallium has a built-in shader sanity checker. This option controls whether
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| /xsrc/external/mit/MesaLib.old/dist/src/egl/ |
| H A D | Android.mk | 78 # This controls enabling building of driver libraries
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| /xsrc/external/mit/MesaLib.old/dist/src/gallium/docs/source/drivers/openswr/ |
| H A D | knobs.rst | 5 operation, in addition to the normal Mesa and gallium controls.
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| /xsrc/external/mit/MesaLib/dist/docs/drivers/openswr/ |
| H A D | knobs.rst | 5 operation, in addition to the normal Mesa and gallium controls.
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| /xsrc/external/mit/MesaLib/dist/src/amd/compiler/ |
| H A D | README-ISA.md | 132 * DLC ("device level coherent") bit: controls the L1 cache 133 * GLC ("globally coherent") bit: controls the L0 cache
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